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authorJan Vesely <jan.vesely@rutgers.edu>2014-06-18 17:57:29 +0000
committerJan Vesely <jan.vesely@rutgers.edu>2014-06-18 17:57:29 +0000
commit52b6c2d6efccb774da0244b65a4d9380b0a107eb (patch)
tree1e7a7f6570ff7f2cae9beb4f6baf85d137f14159 /lib
parent0c57babfc6fde8f6b5b5e1ca810b85fa2afd734a (diff)
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R600: Expand vector fceil
Move fp64 fceil tests to fceil64.ll v2: rebase Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211194 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/R600/AMDGPUISelLowering.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
index e9720ef8af..dc39bee651 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -317,6 +317,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
for (MVT VT : FloatVectorTypes) {
setOperationAction(ISD::FABS, VT, Expand);
setOperationAction(ISD::FADD, VT, Expand);
+ setOperationAction(ISD::FCEIL, VT, Expand);
setOperationAction(ISD::FCOS, VT, Expand);
setOperationAction(ISD::FDIV, VT, Expand);
setOperationAction(ISD::FPOW, VT, Expand);