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authorAnton Korobeynikov <asl@math.spbu.ru>2009-07-16 14:31:14 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2009-07-16 14:31:14 +0000
commit54681eca6900295a5592fba82ccf6120e0a65db2 (patch)
treefcf77d94d458595968d7425c18187af12304727d /lib
parent9419a0d13df0923fb5009bd4158e4d2347ed27ea (diff)
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Fix logic inversion for RI-mode address selection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/SystemZ/SystemZISelDAGToDAG.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 4fccbf2563..bc9c5ec7bf 100644
--- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -241,7 +241,7 @@ bool SystemZDAGToDAGISel::MatchAddress(SDValue N, SystemZRRIAddressMode &AM,
break;
}
// Test if the index field is free for use.
- if (AM.IndexReg.getNode() && !AM.isRI) {
+ if (AM.IndexReg.getNode() || AM.isRI) {
AM = Backup;
break;
}