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authorEli Friedman <eli.friedman@gmail.com>2009-08-23 00:14:19 +0000
committerEli Friedman <eli.friedman@gmail.com>2009-08-23 00:14:19 +0000
commit5aba5c0e882fca505e3e0fc784c37a85babb872e (patch)
treebe5d8ad305609fa4670d5d004a931992e3ab4391 /lib
parentde51ded2fa3d8d92e821e72294a89c1310a70cc6 (diff)
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Add check for completeness. Note that this doesn't actually have any
effect with the way the current code is structured. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79792 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 4138e98f18..301c7b35c3 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3460,7 +3460,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) {
unsigned EVTBits = ExtVT.getSizeInBits();
unsigned ShAmt = 0;
- if (N0.getOpcode() == ISD::SRL && N0.hasOneUse()) {
+ if (N0.getOpcode() == ISD::SRL && N0.hasOneUse() && ExtVT.isRound()) {
if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
ShAmt = N01->getZExtValue();
// Is the shift amount a multiple of size of VT?