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| author | Tim Northover <tnorthover@apple.com> | 2014-04-30 09:32:01 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-04-30 09:32:01 +0000 |
| commit | 5b188b1cb8de7b7973aceecef08ee5ce44ee2cfc (patch) | |
| tree | e424a6d38d8d3cf2a34e38adf83faf7ad26f6951 /lib | |
| parent | 6253c04fc9aefef98586e181329be742e7bb8d15 (diff) | |
| download | llvm-5b188b1cb8de7b7973aceecef08ee5ce44ee2cfc.tar.gz llvm-5b188b1cb8de7b7973aceecef08ee5ce44ee2cfc.tar.bz2 llvm-5b188b1cb8de7b7973aceecef08ee5ce44ee2cfc.tar.xz | |
ARM64: make sure FastISel uses a GPR64 source in 64-bit extensions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207620 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM64/ARM64FastISel.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/ARM64/ARM64FastISel.cpp b/lib/Target/ARM64/ARM64FastISel.cpp index 560520e90a..cadd960b8c 100644 --- a/lib/Target/ARM64/ARM64FastISel.cpp +++ b/lib/Target/ARM64/ARM64FastISel.cpp @@ -1746,6 +1746,15 @@ unsigned ARM64FastISel::EmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, // Handle i8 and i16 as i32. if (DestVT == MVT::i8 || DestVT == MVT::i16) DestVT = MVT::i32; + else if (DestVT == MVT::i64) { + unsigned Src64 = MRI.createVirtualRegister(&ARM64::GPR64RegClass); + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, + TII.get(ARM64::SUBREG_TO_REG), Src64) + .addImm(0) + .addReg(SrcReg) + .addImm(ARM64::sub_32); + SrcReg = Src64; + } unsigned ResultReg = createResultReg(TLI.getRegClassFor(DestVT)); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) |