There shalt be only one "immediate" operand type!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8

16 files changed, 47 insertions, 61 deletions

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index dad1e1f2e7..90cec5a0a0 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -160,10 +160,7 @@ static void print(const MachineOperand &MO, std::ostream &OS,
   case MachineOperand::MO_VirtualRegister:
     OutputReg(OS, MO.getReg(), MRI);
     break;
-  case MachineOperand::MO_SignExtendedImmed:
-    OS << (long)MO.getImmedValue();
-    break;
-  case MachineOperand::MO_UnextendedImmed:
+  case MachineOperand::MO_Immediate:
     OS << (long)MO.getImmedValue();
     break;
   case MachineOperand::MO_MachineBasicBlock:
@@ -260,10 +257,7 @@ std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
   case MachineOperand::MO_VirtualRegister:
     OutputReg(OS, MO.getReg());
     break;
-  case MachineOperand::MO_SignExtendedImmed:
-    OS << (long)MO.getImmedValue();
-    break;
-  case MachineOperand::MO_UnextendedImmed:
+  case MachineOperand::MO_Immediate:
     OS << (long)MO.getImmedValue();
     break;
   case MachineOperand::MO_MachineBasicBlock:
diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp
index 1e360676b6..e51b78457b 100644
--- a/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -97,8 +97,7 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
     O << RI.get(MO.getReg()).Name;
     return;
 
-  case MachineOperand::MO_SignExtendedImmed:
-  case MachineOperand::MO_UnextendedImmed:
+  case MachineOperand::MO_Immediate:
     std::cerr << "printOp() does not handle immediate values\n";
     abort();
     return;
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp
index 85c9da8e64..95f60ed2e6 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -234,14 +234,14 @@ AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
     //inst off the SP/FP
     //fix up the old:
     MI.SetMachineOperandReg(i + 1, Alpha::R28);
-    MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
+    MI.SetMachineOperandConst(i, MachineOperand::MO_Immediate,
                               getLower16(Offset));
     //insert the new
     MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
       .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
     MBB.insert(II, nMI);
   } else {
-    MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
+    MI.SetMachineOperandConst(i, MachineOperand::MO_Immediate, Offset);
   }
 }
 
diff --git a/lib/Target/IA64/IA64AsmPrinter.cpp b/lib/Target/IA64/IA64AsmPrinter.cpp
index 087fcc32d8..86b8432a3f 100644
--- a/lib/Target/IA64/IA64AsmPrinter.cpp
+++ b/lib/Target/IA64/IA64AsmPrinter.cpp
@@ -170,16 +170,15 @@ bool IA64AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
 }
 
 void IA64AsmPrinter::printOp(const MachineOperand &MO,
-                                 bool isBRCALLinsn /* = false */) {
+                             bool isBRCALLinsn /* = false */) {
   const MRegisterInfo &RI = *TM.getRegisterInfo();
   switch (MO.getType()) {
   case MachineOperand::MO_VirtualRegister:
     O << RI.get(MO.getReg()).Name;
     return;
 
-  case MachineOperand::MO_SignExtendedImmed:
-  case MachineOperand::MO_UnextendedImmed:
-    O << /*(unsigned int)*/MO.getImmedValue();
+  case MachineOperand::MO_Immediate:
+    O << MO.getImmedValue();
     return;
   case MachineOperand::MO_MachineBasicBlock:
     printBasicBlockLabel(MO.getMachineBasicBlock());
diff --git a/lib/Target/IA64/IA64InstrBuilder.h b/lib/Target/IA64/IA64InstrBuilder.h
index 832fbb928c..f9b5004501 100644
--- a/lib/Target/IA64/IA64InstrBuilder.h
+++ b/lib/Target/IA64/IA64InstrBuilder.h
@@ -29,9 +29,9 @@ inline const MachineInstrBuilder&
 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
                   bool mem = true) {
   if (mem)
-    return MIB.addSImm(Offset).addFrameIndex(FI);
+    return MIB.addImm(Offset).addFrameIndex(FI);
   else
-    return MIB.addFrameIndex(FI).addSImm(Offset);
+    return MIB.addFrameIndex(FI).addImm(Offset);
 }
 
 /// addConstantPoolReference - This function is used to add a reference to the
@@ -43,7 +43,7 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
 inline const MachineInstrBuilder&
 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
                          int Offset = 0) {
-  return MIB.addSImm(Offset).addConstantPoolIndex(CPI);
+  return MIB.addImm(Offset).addConstantPoolIndex(CPI);
 }
 
 } // End llvm namespace
diff --git a/lib/Target/IA64/IA64RegisterInfo.cpp b/lib/Target/IA64/IA64RegisterInfo.cpp
index e9a809f407..53fec20ec1 100644
--- a/lib/Target/IA64/IA64RegisterInfo.cpp
+++ b/lib/Target/IA64/IA64RegisterInfo.cpp
@@ -122,11 +122,11 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
       MachineInstr *New;
       if (Old->getOpcode() == IA64::ADJUSTCALLSTACKDOWN) {
         New=BuildMI(IA64::ADDIMM22, 2, IA64::r12).addReg(IA64::r12)
-          .addSImm(-Amount);
+          .addImm(-Amount);
       } else {
         assert(Old->getOpcode() == IA64::ADJUSTCALLSTACKUP);
         New=BuildMI(IA64::ADDIMM22, 2, IA64::r12).addReg(IA64::r12)
-          .addSImm(Amount);
+          .addImm(Amount);
       }
 
       // Replace the pseudo instruction with a new instruction...
@@ -173,7 +173,7 @@ void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const
                                // (the bundler wants to know this)
     //insert the new
     MachineInstr* nMI=BuildMI(IA64::ADDIMM22, 2, IA64::r22)
-      .addReg(BaseRegister).addSImm(Offset);
+      .addReg(BaseRegister).addImm(Offset);
     MBB.insert(II, nMI);
   } else { // it's big
     //fix up the old:
@@ -181,7 +181,7 @@ void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const
     MI.getOperand(i).setUse(); // mark r22 as being used
                                // (the bundler wants to know this)
     MachineInstr* nMI;
-    nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(Offset);
+    nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addImm(Offset);
     MBB.insert(II, nMI);
     nMI=BuildMI(IA64::ADD, 2, IA64::r22).addReg(BaseRegister)
       .addReg(IA64::r22);
@@ -272,7 +272,7 @@ void IA64RegisterInfo::emitPrologue(MachineFunction &MF) const {
     MI=BuildMI(IA64::ADDIMM22, 2, IA64::r12).addReg(IA64::r12).addImm(-NumBytes);
     MBB.insert(MBBI, MI);
   } else { // we use r22 as a scratch register here
-    MI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(-NumBytes);
+    MI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addImm(-NumBytes);
     // FIXME: MOVLSI32 expects a _u_32imm
     MBB.insert(MBBI, MI);  // first load the decrement into r22
     MI=BuildMI(IA64::ADD, 2, IA64::r12).addReg(IA64::r12).addReg(IA64::r22);
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index e85ce9fd6f..5e30fe073c 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -356,8 +356,7 @@ void PPCAsmPrinter::printOp(const MachineOperand &MO) {
     O << RI.get(MO.getReg()).Name;
     return;
 
-  case MachineOperand::MO_SignExtendedImmed:
-  case MachineOperand::MO_UnextendedImmed:
+  case MachineOperand::MO_Immediate:
     std::cerr << "printOp() does not handle immediate values\n";
     abort();
     return;
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index 543c390037..657ff6ce63 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -131,7 +131,7 @@ bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
         if (Displacement >= -32768 && Displacement <= 32767) {
           BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
         } else {
-          BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addSImm(8);
+          BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(8);
           BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
         }
         
diff --git a/lib/Target/PowerPC/PPCInstrBuilder.h b/lib/Target/PowerPC/PPCInstrBuilder.h
index b97178f52c..386191836b 100644
--- a/lib/Target/PowerPC/PPCInstrBuilder.h
+++ b/lib/Target/PowerPC/PPCInstrBuilder.h
@@ -33,9 +33,9 @@ inline const MachineInstrBuilder&
 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
                   bool mem = true) {
   if (mem)
-    return MIB.addSImm(Offset).addFrameIndex(FI);
+    return MIB.addImm(Offset).addFrameIndex(FI);
   else
-    return MIB.addFrameIndex(FI).addSImm(Offset);
+    return MIB.addFrameIndex(FI).addImm(Offset);
 }
 
 /// addConstantPoolReference - This function is used to add a reference to the
@@ -47,7 +47,7 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
 inline const MachineInstrBuilder&
 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
                          int Offset = 0) {
-  return MIB.addSImm(Offset).addConstantPoolIndex(CPI);
+  return MIB.addImm(Offset).addConstantPoolIndex(CPI);
 }
 
 } // End llvm namespace
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 1f95f49192..24da5a378f 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -269,10 +269,10 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
 
       // Replace the pseudo instruction with a new instruction...
       if (Old->getOpcode() == PPC::ADJCALLSTACKDOWN) {
-        BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addSImm(-Amount);
+        BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addImm(-Amount);
       } else {
         assert(Old->getOpcode() == PPC::ADJCALLSTACKUP);
-        BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addSImm(Amount);
+        BuildMI(MBB, I, PPC::ADDI, 2, PPC::R1).addReg(PPC::R1).addImm(Amount);
       }
     }
   }
@@ -311,7 +311,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
   if (Offset > 32767 || Offset < -32768) {
     // Insert a set of r0 with the full offset value before the ld, st, or add
     MachineBasicBlock *MBB = MI.getParent();
-    BuildMI(*MBB, II, PPC::LIS, 1, PPC::R0).addSImm(Offset >> 16);
+    BuildMI(*MBB, II, PPC::LIS, 1, PPC::R0).addImm(Offset >> 16);
     BuildMI(*MBB, II, PPC::ORI, 2, PPC::R0).addReg(PPC::R0).addImm(Offset);
     
     // convert into indexed form of the instruction
@@ -333,8 +333,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
       Offset >>= 2;    // The actual encoded value has the low two bits zero.
       break;
     }
-    MI.SetMachineOperandConst(OffIdx, MachineOperand::MO_SignExtendedImmed,
-                              Offset);
+    MI.SetMachineOperandConst(OffIdx, MachineOperand::MO_Immediate, Offset);
   }
 }
 
@@ -511,14 +510,14 @@ void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
     BuildMI(MBB, MBBI, PPC::RLWINM, 4, PPC::R0)
       .addReg(PPC::R1).addImm(0).addImm(32-Log2_32(MaxAlign)).addImm(31);
     BuildMI(MBB, MBBI, PPC::SUBFIC,2,PPC::R0).addReg(PPC::R0)
-      .addSImm(MaxAlign-NumBytes);
+      .addImm(MaxAlign-NumBytes);
     BuildMI(MBB, MBBI, PPC::STWUX, 3)
       .addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0);
   } else if (NumBytes <= 32768) {
-    BuildMI(MBB, MBBI, PPC::STWU, 3).addReg(PPC::R1).addSImm(NegNumbytes)
+    BuildMI(MBB, MBBI, PPC::STWU, 3).addReg(PPC::R1).addImm(NegNumbytes)
       .addReg(PPC::R1);
   } else {
-    BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addSImm(NegNumbytes >> 16);
+    BuildMI(MBB, MBBI, PPC::LIS, 1, PPC::R0).addImm(NegNumbytes >> 16);
     BuildMI(MBB, MBBI, PPC::ORI, 2, PPC::R0).addReg(PPC::R0)
       .addImm(NegNumbytes & 0xFFFF);
     BuildMI(MBB, MBBI, PPC::STWUX, 3).addReg(PPC::R1).addReg(PPC::R1)
@@ -534,13 +533,13 @@ void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
     MachineLocation Src(MachineLocation::VirtualFP, NegNumbytes);
     Moves.push_back(new MachineMove(LabelID, Dst, Src));
 
-    BuildMI(MBB, MBBI, PPC::DWARF_LABEL, 1).addSImm(LabelID);
+    BuildMI(MBB, MBBI, PPC::DWARF_LABEL, 1).addImm(LabelID);
   }
   
   // If there is a frame pointer, copy R1 (SP) into R31 (FP)
   if (HasFP) {
     BuildMI(MBB, MBBI, PPC::STW, 3)
-      .addReg(PPC::R31).addSImm(GPRSize).addReg(PPC::R1);
+      .addReg(PPC::R31).addImm(GPRSize).addReg(PPC::R1);
     BuildMI(MBB, MBBI, PPC::OR4, 2, PPC::R31).addReg(PPC::R1).addReg(PPC::R1);
   }
 }
@@ -564,16 +563,16 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
     // its stack slot.
     if (hasFP(MF)) {
       BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R31)
-          .addSImm(GPRSize).addReg(PPC::R31);
+          .addImm(GPRSize).addReg(PPC::R31);
     }
     
     // The loaded (or persistent) stack pointer value is offseted by the 'stwu'
     // on entry to the function.  Add this offset back now.
     if (NumBytes < 32768 && TargetAlign >= MFI->getMaxAlignment()) {
       BuildMI(MBB, MBBI, PPC::ADDI, 2, PPC::R1)
-          .addReg(PPC::R1).addSImm(NumBytes);
+          .addReg(PPC::R1).addImm(NumBytes);
     } else {
-      BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R1).addSImm(0).addReg(PPC::R1);
+      BuildMI(MBB, MBBI, PPC::LWZ, 2, PPC::R1).addImm(0).addReg(PPC::R1);
     }
   }
 }
diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp
index 2d81bbd670..d95ca9c1f9 100644
--- a/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -153,8 +153,7 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
       O << "%reg" << MO.getReg();
     break;
 
-  case MachineOperand::MO_SignExtendedImmed:
-  case MachineOperand::MO_UnextendedImmed:
+  case MachineOperand::MO_Immediate:
     O << (int)MO.getImmedValue();
     break;
   case MachineOperand::MO_MachineBasicBlock:
@@ -192,8 +191,7 @@ void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
   if (OpTy == MachineOperand::MO_VirtualRegister &&
       MI->getOperand(opNum+1).getReg() == SP::G0)
     return;   // don't print "+%g0"
-  if ((OpTy == MachineOperand::MO_SignExtendedImmed ||
-       OpTy == MachineOperand::MO_UnextendedImmed) &&
+  if (OpTy == MachineOperand::MO_Immediate &&
       MI->getOperand(opNum+1).getImmedValue() == 0)
     return;   // don't print "+0"
   
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index 75c3378cbb..d72ca74516 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -111,7 +111,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
   if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
     Size = -Size;
   if (Size)
-    BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addSImm(Size);
+    BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addImm(Size);
   MBB.erase(I);
 }
 
@@ -136,7 +136,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
     // If the offset is small enough to fit in the immediate field, directly
     // encode it.
     MI.SetMachineOperandReg(i, SP::I6);
-    MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,Offset);
+    MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate, Offset);
   } else {
     // Otherwise, emit a G1 = SETHI %hi(offset).  FIXME: it would be better to 
     // scavenge a register here instead of reserving G1 all of the time.
@@ -147,7 +147,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
             SP::G1).addReg(SP::G1).addReg(SP::I6);
     // Insert: G1+%lo(offset) into the user.
     MI.SetMachineOperandReg(i, SP::G1);
-    MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,
+    MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate,
                               Offset & ((1 << 10)-1));
   }
 }
diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp
index 5283ddd79e..122b012453 100755
--- a/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -116,8 +116,7 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
       O << (char)tolower(*Name);
     return;
 
-  case MachineOperand::MO_SignExtendedImmed:
-  case MachineOperand::MO_UnextendedImmed:
+  case MachineOperand::MO_Immediate:
     if (!Modifier || strcmp(Modifier, "debug") != 0)
       O << '$';
     O << (int)MO.getImmedValue();
diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index 6a3c116f6d..91a1069757 100644
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -61,7 +61,7 @@ inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
                                                unsigned Reg) {
   // Because memory references are always represented with four
   // values, this adds: Reg, [1, NoReg, 0] to the instruction.
-  return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(0);
+  return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(0);
 }
 
 
@@ -71,14 +71,14 @@ inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
 ///
 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
                                                unsigned Reg, int Offset) {
-  return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset);
+  return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(Offset);
 }
 
 /// addRegReg - This function is used to add a memory reference of the form:
 /// [Reg + Reg].
 inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB,
                                             unsigned Reg1, unsigned Reg2) {
-  return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addSImm(0);
+  return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addImm(0);
 }
 
 inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
@@ -95,7 +95,7 @@ inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
   if (AM.GV)
     return MIB.addGlobalAddress(AM.GV, AM.Disp);
   else
-    return MIB.addSImm(AM.Disp);
+    return MIB.addImm(AM.Disp);
 }
 
 /// addFrameReference - This function is used to add a reference to the base of
@@ -105,7 +105,7 @@ inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
 ///
 inline const MachineInstrBuilder &
 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
-  return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addSImm(Offset);
+  return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addImm(Offset);
 }
 
 /// addConstantPoolReference - This function is used to add a reference to the
@@ -117,7 +117,7 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
 inline const MachineInstrBuilder &
 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
                          int Offset = 0) {
-  return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addSImm(Offset);
+  return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addImm(Offset);
 }
 
 } // End llvm namespace
diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp
index 0c6c6b4445..07dab8a478 100755
--- a/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -107,8 +107,7 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
       O << "reg" << MO.getReg();
     return;
 
-  case MachineOperand::MO_SignExtendedImmed:
-  case MachineOperand::MO_UnextendedImmed:
+  case MachineOperand::MO_Immediate:
     O << (int)MO.getImmedValue();
     return;
   case MachineOperand::MO_MachineBasicBlock:
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index a9e345fc68..9f4a561d1a 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -676,7 +676,7 @@ void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{
   else
     Offset += 4;  // Skip the saved EBP
 
-  MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
+  MI.SetMachineOperandConst(i+3, MachineOperand::MO_Immediate, Offset);
 }
 
 void