Make the type of shift amount i32 in order to reduce the number of shift

instruction definitions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143989 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 7 insertions, 5 deletions

diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td
index 3708c4a362..83bd7b88c5 100644
--- a/lib/Target/Mips/Mips64InstrInfo.td
+++ b/lib/Target/Mips/Mips64InstrInfo.td
@@ -32,7 +32,7 @@ def Subtract32 : SDNodeXForm<imm, [{
 def immZExt5_64 : ImmLeaf<i64, [{return Imm == (Imm & 0x1f);}]>;
 
 // imm32_63 predicate - True if imm is in range [32, 63].
-def imm32_63 : ImmLeaf<i64,
+def imm32_63 : ImmLeaf<i32,
                        [{return (int32_t)Imm >= 32 && (int32_t)Imm < 64;}],
                        Subtract32>;
 
@@ -43,12 +43,12 @@ def imm32_63 : ImmLeaf<i64,
 // 64-bit shift instructions.
 class shift_rotate_imm64<bits<6> func, bits<5> isRotate, string instr_asm,
                          SDNode OpNode>:
-  shift_rotate_imm<func, isRotate, instr_asm, OpNode, immZExt5_64, shamt_64,
+  shift_rotate_imm<func, isRotate, instr_asm, OpNode, immZExt5, shamt,
                    CPU64Regs>;
 
 class shift_rotate_imm64_32<bits<6> func, bits<5> isRotate, string instr_asm,
                             SDNode OpNode>:
-  shift_rotate_imm<func, isRotate, instr_asm, OpNode, imm32_63, shamt_64,
+  shift_rotate_imm<func, isRotate, instr_asm, OpNode, imm32_63, shamt,
                    CPU64Regs>;
 
 // Mul, Div
diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h
index 62e7f09582..f2b64e36f1 100644
--- a/lib/Target/Mips/MipsISelLowering.h
+++ b/lib/Target/Mips/MipsISelLowering.h
@@ -98,6 +98,8 @@ namespace llvm {
   public:
     explicit MipsTargetLowering(MipsTargetMachine &TM);
 
+    virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i32; }
+
     virtual bool allowsUnalignedMemoryAccesses (EVT VT) const;
 
     /// LowerOperation - Provide custom lowering hooks for some operations.
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td
index fd99b13126..64dbd26469 100644
--- a/lib/Target/Mips/MipsInstrInfo.td
+++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -327,9 +327,9 @@ class shift_rotate_imm32<bits<6> func, bits<5> isRotate, string instr_asm,
 
 class shift_rotate_reg<bits<6> func, bits<5> isRotate, string instr_asm,
                        SDNode OpNode, RegisterClass RC>:
-  FR<0x00, func, (outs RC:$rd), (ins RC:$rs, RC:$rt),
+  FR<0x00, func, (outs RC:$rd), (ins CPURegs:$rs, RC:$rt),
      !strconcat(instr_asm, "\t$rd, $rt, $rs"),
-     [(set RC:$rd, (OpNode RC:$rt, RC:$rs))], IIAlu> {
+     [(set RC:$rd, (OpNode RC:$rt, CPURegs:$rs))], IIAlu> {
   let shamt = isRotate;
 }