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| author | Chad Rosier <mcrosier@apple.com> | 2012-11-07 00:13:01 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2012-11-07 00:13:01 +0000 |
| commit | 6aa6e5a2852ad5c83cef5eb52f62f9267e3511ea (patch) | |
| tree | 832eb8e5950011020ff1a733f3e0868c00536b58 /lib | |
| parent | dccd7f9187ca4b693358e65a5bd560688c91cc73 (diff) | |
| download | llvm-6aa6e5a2852ad5c83cef5eb52f62f9267e3511ea.tar.gz llvm-6aa6e5a2852ad5c83cef5eb52f62f9267e3511ea.tar.bz2 llvm-6aa6e5a2852ad5c83cef5eb52f62f9267e3511ea.tar.xz | |
[arm fast-isel] Appease the machine verifier by using the proper register
classes. For my test case the number of errors drop from 356 to 21.
Part of rdar://12594152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167508 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 89b85d09b7..6611862ca0 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -619,7 +619,10 @@ unsigned ARMFastISel::ARMMaterializeGV(const GlobalValue *GV, EVT VT) { Reloc::Model RelocM = TM.getRelocationModel(); bool IsIndirect = Subtarget->GVIsIndirectSymbol(GV, RelocM); - unsigned DestReg = createResultReg(TLI.getRegClassFor(VT)); + const TargetRegisterClass *RC = isThumb2 ? + (const TargetRegisterClass*)&ARM::rGPRRegClass : + (const TargetRegisterClass*)&ARM::GPRRegClass; + unsigned DestReg = createResultReg(RC); // Use movw+movt when possible, it avoids constant pool entries. // Darwin targets don't support movt with Reloc::Static, see |