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authorAndrew Trick <atrick@apple.com>2013-11-14 06:54:10 +0000
committerAndrew Trick <atrick@apple.com>2013-11-14 06:54:10 +0000
commit72cf01cc7c8f668a17e7fdfe6aaed50e164cac1b (patch)
treeb9c818979a36538b2eb87abe8b9a543201e8cbd2 /lib
parent27df434c5e8c78e8b3e6e9596b55a6a6bd8d5116 (diff)
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Minor extension to llvm.experimental.patchpoint: don't require a call.
If a null call target is provided, don't emit a dummy call. This allows the runtime to reserve as little nop space as it needs without the requirement of emitting a call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194676 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp2
-rw-r--r--lib/Target/X86/X86MCInstLower.cpp27
2 files changed, 17 insertions, 12 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 98e067ebd4..e80b63021f 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -6826,7 +6826,7 @@ void SelectionDAGBuilder::visitStackmap(const CallInst &CI) {
/// \brief Lower llvm.experimental.patchpoint directly to its target opcode.
void SelectionDAGBuilder::visitPatchpoint(const CallInst &CI) {
// void|i64 @llvm.experimental.patchpoint.void|i64(i32 <id>,
- // i32 <numNopBytes>,
+ // i32 <numBytes>,
// i8* <target>,
// i32 <numArgs>,
// [Args...],
diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp
index c718b1cceb..5c3f9af8bf 100644
--- a/lib/Target/X86/X86MCInstLower.cpp
+++ b/lib/Target/X86/X86MCInstLower.cpp
@@ -765,6 +765,8 @@ static void LowerSTACKMAP(MCStreamer &OutStreamer,
OutStreamer.EmitInstruction(MCInstBuilder(X86::NOOP));
}
+// Lower a patchpoint of the form:
+// [<def>], <id>, <numBytes>, <target>, <numArgs>
static void LowerPATCHPOINT(MCStreamer &OutStreamer,
X86MCInstLower &MCInstLowering,
StackMaps &SM,
@@ -813,17 +815,20 @@ static void LowerPATCHPOINT(MCStreamer &OutStreamer,
getStackMapEndMOP(MI.operands_begin(), MI.operands_end()),
isAnyRegCC && hasDef);
- // Emit MOV to materialize the target address and the CALL to target.
- // This is encoded with 12-13 bytes, depending on which register is used.
- // We conservatively assume that it is 12 bytes and emit in worst case one
- // extra NOP byte.
- unsigned EncodedBytes = 12;
- OutStreamer.EmitInstruction(MCInstBuilder(X86::MOV64ri)
- .addReg(MI.getOperand(ScratchIdx).getReg())
- .addImm(MI.getOperand(StartIdx + 2).getImm()));
- OutStreamer.EmitInstruction(MCInstBuilder(X86::CALL64r)
- .addReg(MI.getOperand(ScratchIdx).getReg()));
-
+ unsigned EncodedBytes = 0;
+ int64_t CallTarget = MI.getOperand(StartIdx + 2).getImm();
+ if (CallTarget) {
+ // Emit MOV to materialize the target address and the CALL to target.
+ // This is encoded with 12-13 bytes, depending on which register is used.
+ // We conservatively assume that it is 12 bytes and emit in worst case one
+ // extra NOP byte.
+ EncodedBytes = 12;
+ OutStreamer.EmitInstruction(MCInstBuilder(X86::MOV64ri)
+ .addReg(MI.getOperand(ScratchIdx).getReg())
+ .addImm(CallTarget));
+ OutStreamer.EmitInstruction(MCInstBuilder(X86::CALL64r)
+ .addReg(MI.getOperand(ScratchIdx).getReg()));
+ }
// Emit padding.
unsigned NumNOPBytes = MI.getOperand(StartIdx + 1).getImm();
assert(NumNOPBytes >= EncodedBytes &&