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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-09 09:24:49 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-09 09:24:49 +0000 |
| commit | 76056a01450ca52b3ab1d105a9c39f63446982f1 (patch) | |
| tree | e0bfb9045b3f1beb07f92ab474351728095c492f /lib | |
| parent | 8d24d43c95eda711f1491dfd2eda91911ab91f04 (diff) | |
| download | llvm-76056a01450ca52b3ab1d105a9c39f63446982f1.tar.gz llvm-76056a01450ca52b3ab1d105a9c39f63446982f1.tar.bz2 llvm-76056a01450ca52b3ab1d105a9c39f63446982f1.tar.xz | |
[mips] Added missing dsra -> dsrav and sra -> srav aliases.
Summary: dsll, dsrl, sll, and srl already exist.
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3673
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208397 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 2 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 6 |
2 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index 2fe1bfc443..92742db1f8 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -452,6 +452,8 @@ def : MipsInstAlias<"dsubu $rs, $imm", (DADDiu GPR64Opnd:$rs, GPR64Opnd:$rs, InvertedImOperand64:$imm), 0>; +def : MipsInstAlias<"dsra $rd, $rt, $rs", + (DSRAV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>; def : MipsInstAlias<"dsrl $rd, $rt, $rs", (DSRLV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>; diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 3b18b43b23..b2d4b957f9 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -1293,8 +1293,10 @@ def : MipsInstAlias<"subu, $rd, $rs, $imm", InvertedImOperand:$imm)>; def : MipsInstAlias<"subu $rs, $imm", (ADDiu GPR32Opnd:$rs, GPR32Opnd:$rs, InvertedImOperand:$imm), 0>; -def : MipsInstAlias<"srl $rd, $rt, $rs", - (SRLV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; +def : MipsInstAlias<"sra $rd, $rt, $rs", + (SRAV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; +def : MipsInstAlias<"srl $rd, $rt, $rs", + (SRLV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>; //===----------------------------------------------------------------------===// // Assembler Pseudo Instructions //===----------------------------------------------------------------------===// |