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author | Tom Stellard <thomas.stellard@amd.com> | 2014-03-07 20:12:33 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-03-07 20:12:33 +0000 |
commit | 7e06370873060c29be3bf0b3308205d165228187 (patch) | |
tree | dded0d0a3e1455f2039b26d5fc81517dce3c506d /lib | |
parent | adb294d28413587e0718a6130e8cf90472cda21e (diff) | |
download | llvm-7e06370873060c29be3bf0b3308205d165228187.tar.gz llvm-7e06370873060c29be3bf0b3308205d165228187.tar.bz2 llvm-7e06370873060c29be3bf0b3308205d165228187.tar.xz |
R600/SI: Custom lower i1 stores
These are sometimes created by the shrink to boolean optimization in the
globalopt pass.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203280 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/R600/SIISelLowering.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp index 465e3bacc7..8cf1b82b7b 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/R600/SIISelLowering.cpp @@ -98,6 +98,7 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : setOperationAction(ISD::LOAD, MVT::v4i32, Custom); setOperationAction(ISD::LOAD, MVT::v8i32, Custom); + setOperationAction(ISD::STORE, MVT::i1, Custom); setOperationAction(ISD::STORE, MVT::i32, Custom); setOperationAction(ISD::STORE, MVT::i64, Custom); setOperationAction(ISD::STORE, MVT::i128, Custom); @@ -844,6 +845,11 @@ SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const { if (VT.isVector() && VT.getVectorNumElements() >= 8) return SplitVectorStore(Op, DAG); + if (VT == MVT::i1) + return DAG.getTruncStore(Store->getChain(), DL, + DAG.getSExtOrTrunc(Store->getValue(), DL, MVT::i32), + Store->getBasePtr(), MVT::i1, Store->getMemOperand()); + if (Store->getAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS) return SDValue(); |