summaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2009-09-11 01:01:31 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-09-11 01:01:31 +0000
commit879caeadf3d5c60a3f5f8cb3262adb8d51c2b4a0 (patch)
tree1f20856fcdaa47a8df8d0bebd142696d20e96042 /lib
parent5f12c21320c7214e54b383876c586f57c091458f (diff)
downloadllvm-879caeadf3d5c60a3f5f8cb3262adb8d51c2b4a0.tar.gz
llvm-879caeadf3d5c60a3f5f8cb3262adb8d51c2b4a0.tar.bz2
llvm-879caeadf3d5c60a3f5f8cb3262adb8d51c2b4a0.tar.xz
Follow up to 81494. When the folded reload is narrowed to a 32-bit load then change the destination register to a 32-bit one or add a sub-register index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81496 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp16
1 files changed, 16 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 46e63b2d3b..859ad57725 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -2206,6 +2206,7 @@ X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
unsigned MinAlign = I->second.second;
if (Align < MinAlign)
return NULL;
+ bool NarrowToMOV32rm = false;
if (Size) {
unsigned RCSize = MI->getDesc().OpInfo[i].getRegClass(&RI)->getSize();
if (Size < RCSize) {
@@ -2216,7 +2217,10 @@ X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
// If this is a 64-bit load, but the spill slot is 32, then we can do
// a 32-bit load which is implicitly zero-extended. This likely is due
// to liveintervalanalysis remat'ing a load from stack slot.
+ if (MI->getOperand(0).getSubReg() || MI->getOperand(1).getSubReg())
+ return NULL;
Opcode = X86::MOV32rm;
+ NarrowToMOV32rm = true;
}
}
@@ -2224,6 +2228,18 @@ X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
NewMI = FuseTwoAddrInst(MF, Opcode, MOs, MI, *this);
else
NewMI = FuseInst(MF, Opcode, i, MOs, MI, *this);
+
+ if (NarrowToMOV32rm) {
+ // If this is the special case where we use a MOV32rm to load a 32-bit
+ // value and zero-extend the top bits. Change the destination register
+ // to a 32-bit one.
+ unsigned DstReg = NewMI->getOperand(0).getReg();
+ if (TargetRegisterInfo::isPhysicalRegister(DstReg))
+ NewMI->getOperand(0).setReg(RI.getSubReg(DstReg,
+ 4/*x86_subreg_32bit*/));
+ else
+ NewMI->getOperand(0).setSubReg(4/*x86_subreg_32bit*/);
+ }
return NewMI;
}
}