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| author | Chris Lattner <sabre@nondot.org> | 2010-04-07 23:50:38 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-04-07 23:50:38 +0000 |
| commit | 87d677c1856bfdcb91d9daeb69dc5f261c73851e (patch) | |
| tree | 9042b4fdff1c3acf39fe6d59e64e85eb87208e3b /lib | |
| parent | 35a389344d21178ee280c2410401b2060b5b879c (diff) | |
| download | llvm-87d677c1856bfdcb91d9daeb69dc5f261c73851e.tar.gz llvm-87d677c1856bfdcb91d9daeb69dc5f261c73851e.tar.bz2 llvm-87d677c1856bfdcb91d9daeb69dc5f261c73851e.tar.xz | |
minor tidying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100725 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 7 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 |
2 files changed, 4 insertions, 5 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 583161fb08..d783dd0b25 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -5326,6 +5326,7 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) { // error. if (OpInfo.hasMatchingInput()) { SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput]; + if (OpInfo.ConstraintVT != Input.ConstraintVT) { if ((OpInfo.ConstraintVT.isInteger() != Input.ConstraintVT.isInteger()) || @@ -5539,10 +5540,9 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) { std::vector<SDValue> Ops; TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode[0], hasMemory, Ops, DAG); - if (Ops.empty()) { + if (Ops.empty()) report_fatal_error("Invalid operand for inline asm" " constraint '" + OpInfo.ConstraintCode + "'!"); - } // Add information to the INLINEASM node to know about this input. unsigned ResOpType = @@ -5574,10 +5574,9 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) { // Copy the input into the appropriate registers. if (OpInfo.AssignedRegs.Regs.empty() || - !OpInfo.AssignedRegs.areValueTypesLegal()) { + !OpInfo.AssignedRegs.areValueTypesLegal()) report_fatal_error("Couldn't allocate input reg for" " constraint '"+ OpInfo.ConstraintCode +"'!"); - } OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, getCurDebugLoc(), Chain, &Flag); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 44f62ab435..c7cc695d6b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -1355,7 +1355,7 @@ SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops) { std::vector<SDValue> SelOps; if (SelectInlineAsmMemoryOperand(InOps[i+1], 'm', SelOps)) report_fatal_error("Could not match memory address. Inline asm" - " failure!"); + " failure!"); // Add this to the output node. unsigned NewFlags = |