diff options
| author | Jim Grosbach <grosbach@apple.com> | 2011-08-16 23:57:34 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-08-16 23:57:34 +0000 |
| commit | 89e2aa6afd408f1b4c6b47c53bbf31d48463bcab (patch) | |
| tree | d822148e220f6254aeea879940c3c1fe09eaa21d /lib | |
| parent | 16280308ac6f20d9da06eafcc19e4a6777f49750 (diff) | |
| download | llvm-89e2aa6afd408f1b4c6b47c53bbf31d48463bcab.tar.gz llvm-89e2aa6afd408f1b4c6b47c53bbf31d48463bcab.tar.bz2 llvm-89e2aa6afd408f1b4c6b47c53bbf31d48463bcab.tar.xz | |
Thumb ADD(immediate) parsing support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 6 | ||||
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 5 |
2 files changed, 8 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 85ffe928a9..ffc74990dd 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -849,7 +849,7 @@ def tADC : // A8.6.2 // Add immediate def tADDi3 : // A8.6.4 T1 - T1sIGenEncodeImm<0b01110, (outs tGPR:$Rd), (ins tGPR:$Rm, i32imm:$imm3), + T1sIGenEncodeImm<0b01110, (outs tGPR:$Rd), (ins tGPR:$Rm, imm0_7:$imm3), IIC_iALUi, "add", "\t$Rd, $Rm, $imm3", [(set tGPR:$Rd, (add tGPR:$Rm, imm0_7:$imm3))]> { @@ -858,8 +858,8 @@ def tADDi3 : // A8.6.4 T1 } def tADDi8 : // A8.6.4 T2 - T1sItGenEncodeImm<{1,1,0,?,?}, (outs tGPR:$Rdn), (ins tGPR:$Rn, i32imm:$imm8), - IIC_iALUi, + T1sItGenEncodeImm<{1,1,0,?,?}, (outs tGPR:$Rdn), + (ins tGPR:$Rn, imm0_255:$imm8), IIC_iALUi, "add", "\t$Rdn, $imm8", [(set tGPR:$Rdn, (add tGPR:$Rn, imm8_255:$imm8))]>; diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 3db8a7d4d1..0313ef4b71 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -3013,6 +3013,11 @@ processInstruction(MCInst &Inst, Inst = TmpInst; } break; + case ARM::tADDi8: + // If the immediate is in the range 0-7, we really wanted tADDi3. + if (Inst.getOperand(3).getImm() < 8) + Inst.setOpcode(ARM::tADDi3); + break; } } |