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authorCraig Topper <craig.topper@gmail.com>2014-01-31 05:42:35 +0000
committerCraig Topper <craig.topper@gmail.com>2014-01-31 05:42:35 +0000
commit8d67f8372ba76c1855bc8c794aaacdd9a2400cae (patch)
tree3ad2188020b6c47b2213c48cd9eb4461d4a430c7 /lib
parent2bb06b00028e7230ed063af6ce7b3e506522c734 (diff)
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Move address override handling in X86CodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200517 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86CodeEmitter.cpp56
1 files changed, 28 insertions, 28 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index a699d67919..b377419c0d 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -654,34 +654,6 @@ void Emitter<CodeEmitter>::emitOpcodePrefix(uint64_t TSFlags,
int MemOperand,
const MachineInstr &MI,
const MCInstrDesc *Desc) const {
- // Emit the lock opcode prefix as needed.
- if (Desc->TSFlags & X86II::LOCK)
- MCE.emitByte(0xF0);
-
- // Emit segment override opcode prefix as needed.
- emitSegmentOverridePrefix(TSFlags, MemOperand, MI);
-
- // Emit the repeat opcode prefix as needed.
- if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP)
- MCE.emitByte(0xF3);
-
- // Emit the address size opcode prefix as needed.
- bool need_address_override;
- if (TSFlags & X86II::AdSize) {
- need_address_override = true;
- } else if (MemOperand == -1) {
- need_address_override = false;
- } else if (Is64BitMode) {
- assert(!Is16BitMemOperand(MI, MemOperand));
- need_address_override = Is32BitMemOperand(MI, MemOperand);
- } else {
- assert(!Is64BitMemOperand(MI, MemOperand));
- need_address_override = Is16BitMemOperand(MI, MemOperand);
- }
-
- if (need_address_override)
- MCE.emitByte(0x67);
-
// Emit the operand size opcode prefix as needed.
if (TSFlags & X86II::OpSize)
MCE.emitByte(0x66);
@@ -1145,6 +1117,34 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
int MemoryOperand = X86II::getMemoryOperandNo(TSFlags, Opcode);
if (MemoryOperand != -1) MemoryOperand += CurOp;
+ // Emit the lock opcode prefix as needed.
+ if (Desc->TSFlags & X86II::LOCK)
+ MCE.emitByte(0xF0);
+
+ // Emit segment override opcode prefix as needed.
+ emitSegmentOverridePrefix(TSFlags, MemoryOperand, MI);
+
+ // Emit the repeat opcode prefix as needed.
+ if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP)
+ MCE.emitByte(0xF3);
+
+ // Emit the address size opcode prefix as needed.
+ bool need_address_override;
+ if (TSFlags & X86II::AdSize) {
+ need_address_override = true;
+ } else if (MemoryOperand < 0) {
+ need_address_override = false;
+ } else if (Is64BitMode) {
+ assert(!Is16BitMemOperand(MI, MemoryOperand));
+ need_address_override = Is32BitMemOperand(MI, MemoryOperand);
+ } else {
+ assert(!Is64BitMemOperand(MI, MemoryOperand));
+ need_address_override = Is16BitMemOperand(MI, MemoryOperand);
+ }
+
+ if (need_address_override)
+ MCE.emitByte(0x67);
+
if (!HasVEXPrefix)
emitOpcodePrefix(TSFlags, MemoryOperand, MI, Desc);
else