diff options
author | Bill Wendling <isanbard@gmail.com> | 2010-09-10 23:34:19 +0000 |
---|---|---|
committer | Bill Wendling <isanbard@gmail.com> | 2010-09-10 23:34:19 +0000 |
commit | 92ad57f066e9f256e4e3d72febf152e68caa80c7 (patch) | |
tree | 1a95be27cf727d9b597de7d9d0f0dffb37686154 /lib | |
parent | d10cd7b31464a73e3a19b9fada80b9567b04d314 (diff) | |
download | llvm-92ad57f066e9f256e4e3d72febf152e68caa80c7.tar.gz llvm-92ad57f066e9f256e4e3d72febf152e68caa80c7.tar.bz2 llvm-92ad57f066e9f256e4e3d72febf152e68caa80c7.tar.xz |
Move some of the decision logic for converting an instruction into one that sets
the 'zero' bit down into the back-end. There are other cases where this logic
isn't sufficient, so they should be handled separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113665 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/PeepholeOptimizer.cpp | 9 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 21 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.h | 3 |
3 files changed, 20 insertions, 13 deletions
diff --git a/lib/CodeGen/PeepholeOptimizer.cpp b/lib/CodeGen/PeepholeOptimizer.cpp index a4ff04bec1..7a1bf4050d 100644 --- a/lib/CodeGen/PeepholeOptimizer.cpp +++ b/lib/CodeGen/PeepholeOptimizer.cpp @@ -240,16 +240,11 @@ bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI, unsigned SrcReg; int CmpValue; if (!TII->AnalyzeCompare(MI, SrcReg, CmpValue) || - TargetRegisterInfo::isPhysicalRegister(SrcReg) || CmpValue != 0) - return false; - - MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg); - if (llvm::next(DI) != MRI->def_end()) - // Only support one definition. + TargetRegisterInfo::isPhysicalRegister(SrcReg)) return false; // Attempt to convert the defining instruction to set the "zero" flag. - if (TII->ConvertToSetZeroFlag(&*DI, MI, NextIter)) { + if (TII->ConvertToSetZeroFlag(MI, NextIter)) { ++NumEliminated; return true; } diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 142633c667..a73e7ad44d 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1377,12 +1377,25 @@ AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const { return false; } -/// ConvertToSetZeroFlag - Convert the instruction to set the "zero" flag so -/// that we can remove a "comparison with zero". Update the iterator *only* if a -/// transformation took place. +/// ConvertToSetZeroFlag - Convert the instruction supplying the argument to the +/// comparison into one that sets the zero bit in the flags register. Update the +/// iterator *only* if a transformation took place. bool ARMBaseInstrInfo:: -ConvertToSetZeroFlag(MachineInstr *MI, MachineInstr *CmpInstr, +ConvertToSetZeroFlag(MachineInstr *CmpInstr, MachineBasicBlock::iterator &MII) const { + unsigned SrcReg; + int CmpValue; + if (!AnalyzeCompare(CmpInstr, SrcReg, CmpValue) || CmpValue != 0) + return false; + + MachineRegisterInfo &MRI = CmpInstr->getParent()->getParent()->getRegInfo(); + MachineRegisterInfo::def_iterator DI = MRI.def_begin(SrcReg); + if (llvm::next(DI) != MRI.def_end()) + // Only support one definition. + return false; + + MachineInstr *MI = &*DI; + // Conservatively refuse to convert an instruction which isn't in the same BB // as the comparison. if (MI->getParent() != CmpInstr->getParent()) diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h index 622402eba3..2be0d3687d 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/lib/Target/ARM/ARMBaseInstrInfo.h @@ -346,8 +346,7 @@ public: /// ConvertToSetZeroFlag - Convert the instruction to set the zero flag so /// that we can remove a "comparison with zero". - virtual bool ConvertToSetZeroFlag(MachineInstr *Instr, - MachineInstr *CmpInstr, + virtual bool ConvertToSetZeroFlag(MachineInstr *CmpInstr, MachineBasicBlock::iterator &MII) const; virtual unsigned getNumMicroOps(const MachineInstr *MI, |