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| author | Evan Cheng <evan.cheng@apple.com> | 2008-05-14 21:08:07 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-14 21:08:07 +0000 |
| commit | 97e60d9e8cf83274a1e4ac6443ed6da76d4b6088 (patch) | |
| tree | 555d2a4436d023f040f69fc61981ac4c14528b9e /lib | |
| parent | 4186ad56cfe70ab065d3ca7aadcded814574fa42 (diff) | |
| download | llvm-97e60d9e8cf83274a1e4ac6443ed6da76d4b6088.tar.gz llvm-97e60d9e8cf83274a1e4ac6443ed6da76d4b6088.tar.bz2 llvm-97e60d9e8cf83274a1e4ac6443ed6da76d4b6088.tar.xz | |
Use a better idiom to silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51131 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 25 |
1 files changed, 5 insertions, 20 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index bca279a97b..70365e2bab 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -406,11 +406,8 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo, // Just use the input register directly! if (InstanceNo > 0) VRBaseMap.erase(SDOperand(Node, ResNo)); -#ifndef NDEBUG bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo),SrcReg)); -#else - VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo),SrcReg)); -#endif + isNew = isNew; // Silence compiler warning. assert(isNew && "Node emitted out of order - early"); return; } @@ -468,11 +465,8 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo, if (InstanceNo > 0) VRBaseMap.erase(SDOperand(Node, ResNo)); -#ifndef NDEBUG bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo), VRBase)); -#else - VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo), VRBase)); -#endif + isNew = isNew; // Silence compiler warning. assert(isNew && "Node emitted out of order - early"); } @@ -529,11 +523,8 @@ void ScheduleDAG::CreateVirtualRegisters(SDNode *Node, MachineInstr *MI, MI->addOperand(MachineOperand::CreateReg(VRBase, true)); } -#ifndef NDEBUG bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,i), VRBase)); -#else - VRBaseMap.insert(std::make_pair(SDOperand(Node,i), VRBase)); -#endif + isNew = isNew; // Silence compiler warning. assert(isNew && "Node emitted out of order - early"); } } @@ -785,11 +776,8 @@ void ScheduleDAG::EmitSubregNode(SDNode *Node, } else assert(0 && "Node is not insert_subreg, extract_subreg, or subreg_to_reg"); -#ifndef NDEBUG bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,0), VRBase)); -#else - VRBaseMap.insert(std::make_pair(SDOperand(Node,0), VRBase)); -#endif + isNew = isNew; // Silence compiler warning. assert(isNew && "Node emitted out of order - early"); } @@ -1016,11 +1004,8 @@ void ScheduleDAG::EmitCrossRCCopy(SUnit *SU, // Copy from physical register. assert(I->Reg && "Unknown physical register!"); unsigned VRBase = MRI.createVirtualRegister(SU->CopyDstRC); -#ifndef NDEBUG bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)); -#else - VRBaseMap.insert(std::make_pair(SU, VRBase)); -#endif + isNew = isNew; // Silence compiler warning. assert(isNew && "Node emitted out of order - early"); TII->copyRegToReg(*BB, BB->end(), VRBase, I->Reg, SU->CopyDstRC, SU->CopySrcRC); |