Don't attach annotations to MCInst's. Instead, have the disassembler return, and the printer accept, an annotation string which can be passed through if the client cares about annotations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139876 91177308-0d34-0410-b5e6-96231b3b80d8

25 files changed, 71 insertions, 88 deletions

diff --git a/lib/MC/MCAsmStreamer.cpp b/lib/MC/MCAsmStreamer.cpp
index 68154345c8..3fcbb05907 100644
--- a/lib/MC/MCAsmStreamer.cpp
+++ b/lib/MC/MCAsmStreamer.cpp
@@ -1244,7 +1244,7 @@ void MCAsmStreamer::EmitInstruction(const MCInst &Inst) {
 
   // If we have an AsmPrinter, use that to print, otherwise print the MCInst.
   if (InstPrinter)
-    InstPrinter->printInst(&Inst, OS);
+    InstPrinter->printInst(&Inst, OS, "");
   else
     Inst.print(OS, &MAI);
   EmitEOL();
diff --git a/lib/MC/MCDisassembler/Disassembler.cpp b/lib/MC/MCDisassembler/Disassembler.cpp
index 858a58cf35..14fab08b87 100644
--- a/lib/MC/MCDisassembler/Disassembler.cpp
+++ b/lib/MC/MCDisassembler/Disassembler.cpp
@@ -144,7 +144,7 @@ size_t LLVMDisasmInstruction(LLVMDisasmContextRef DCR, uint8_t *Bytes,
   MCInstPrinter *IP = DC->getIP();
   MCDisassembler::DecodeStatus S;
   S = DisAsm->getInstruction(Inst, Size, MemoryObject, PC,
-                             /*REMOVE*/ nulls());
+                             /*REMOVE*/ nulls(), DC->CommentStream);
   switch (S) {
   case MCDisassembler::Fail:
   case MCDisassembler::SoftFail:
@@ -152,28 +152,16 @@ size_t LLVMDisasmInstruction(LLVMDisasmContextRef DCR, uint8_t *Bytes,
     return 0;
 
   case MCDisassembler::Success: {
-    SmallVector<char, 64> InsnStr;
-    raw_svector_ostream OS(InsnStr);
-    IP->printInst(&Inst, OS);
-    OS.flush();
-
     DC->CommentStream.flush();
-    assert(DC->CommentsToEmit.back() == '\n');
-
-    DC->CommentsToEmit.push_back('\n');
     StringRef Comments = DC->CommentsToEmit.str();
 
-    do {
-      // Emit a line of comments.
-      size_t Position = Comments.find('\n');
-      OS << ' ' << DC->getAsmInfo()->getCommentString()
-         << ' ' << Comments.substr(0, Position) << '\n';
-
-      Comments = Comments.substr(Position+1);
-    } while (!Comments.empty());
+    SmallVector<char, 64> InsnStr;
+    raw_svector_ostream OS(InsnStr);
+    IP->printInst(&Inst, OS, Comments);
+    OS.flush();
 
-    DC->CommentsToEmit.clear();
     // Tell the comment stream that the vector changed underneath it.
+    DC->CommentsToEmit.clear();
     DC->CommentStream.resync();
 
     assert(OutStringSize != 0 && "Output buffer cannot be zero size");
diff --git a/lib/MC/MCDisassembler/EDDisassembler.cpp b/lib/MC/MCDisassembler/EDDisassembler.cpp
index 70b6300d74..83362a21f7 100644
--- a/lib/MC/MCDisassembler/EDDisassembler.cpp
+++ b/lib/MC/MCDisassembler/EDDisassembler.cpp
@@ -246,7 +246,7 @@ EDInst *EDDisassembler::createInst(EDByteReaderCallback byteReader,
   
   MCDisassembler::DecodeStatus S;
   S = Disassembler->getInstruction(*inst, byteSize, memoryObject, address,
-                                   ErrorStream);
+                                   ErrorStream, nulls());
   switch (S) {
   case MCDisassembler::Fail:
   case MCDisassembler::SoftFail:
@@ -327,7 +327,7 @@ bool EDDisassembler::registerIsProgramCounter(unsigned registerID) {
 int EDDisassembler::printInst(std::string &str, MCInst &inst) {
   PrinterMutex.acquire();
   
-  InstPrinter->printInst(&inst, *InstStream);
+  InstPrinter->printInst(&inst, *InstStream, "");
   InstStream->flush();
   str = *InstString;
   InstString->clear();
diff --git a/lib/MC/MCInst.cpp b/lib/MC/MCInst.cpp
index ec97acc554..4cb628b395 100644
--- a/lib/MC/MCInst.cpp
+++ b/lib/MC/MCInst.cpp
@@ -41,16 +41,6 @@ void MCInst::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
     OS << " ";
     getOperand(i).print(OS, MAI);
   }
-
-  if (getNumAnnotations()) {
-    OS << " # Annots: ";
-    for (unsigned i = 0, e = getNumAnnotations(); i != e; ++i) {
-      OS << " \"";
-      OS << getAnnotation(i);
-      OS << '"';
-    }
-  }
-
   OS << ">";
 }
 
@@ -67,17 +57,6 @@ void MCInst::dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI,
     OS << Separator;
     getOperand(i).print(OS, MAI);
   }
-
-  if (getNumAnnotations()) {
-    OS << " # Annots: ";
-    for (unsigned i = 0, e = getNumAnnotations(); i != e; ++i) {
-      OS << Separator;
-      OS << '"';
-      OS << getAnnotation(i);
-      OS << '"';
-    }
-  }
-
   OS << ">";
 }
 
diff --git a/lib/MC/MCInstPrinter.cpp b/lib/MC/MCInstPrinter.cpp
index f0fa2cda4a..e15e107616 100644
--- a/lib/MC/MCInstPrinter.cpp
+++ b/lib/MC/MCInstPrinter.cpp
@@ -8,8 +8,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/MC/MCInstPrinter.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCInst.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
@@ -27,8 +25,6 @@ void MCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
   assert(0 && "Target should implement this");
 }
 
-void MCInstPrinter::printAnnotations(const MCInst *MI, raw_ostream &OS) {
-  for (unsigned i = 0, e = MI->getNumAnnotations(); i != e; ++i) {
-    OS << MI->getAnnotation(i) << "\n";
-  }
+void MCInstPrinter::printAnnotation(raw_ostream &OS, StringRef Annot) {
+  if (!Annot.empty()) OS << Annot << "\n";
 }
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 6b86e41c45..685b921b4e 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -47,7 +47,8 @@ public:
                               uint64_t &size,
                               const MemoryObject &region,
                               uint64_t address,
-                              raw_ostream &vStream) const;
+                              raw_ostream &vStream,
+                              raw_ostream &cStream) const;
 
   /// getEDInfo - See MCDisassembler.
   EDInstInfo *getEDInfo() const;
@@ -71,7 +72,8 @@ public:
                               uint64_t &size,
                               const MemoryObject &region,
                               uint64_t address,
-                              raw_ostream &vStream) const;
+                              raw_ostream &vStream,
+                              raw_ostream &cStream) const;
 
   /// getEDInfo - See MCDisassembler.
   EDInstInfo *getEDInfo() const;
@@ -328,7 +330,8 @@ EDInstInfo *ThumbDisassembler::getEDInfo() const {
 DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
                                              const MemoryObject &Region,
                                              uint64_t Address,
-                                             raw_ostream &os) const {
+                                             raw_ostream &os,
+                                             raw_ostream &cs) const {
   uint8_t bytes[4];
 
   assert(!(STI.getFeatureBits() & ARM::ModeThumb) &&
@@ -527,7 +530,8 @@ void ThumbDisassembler::UpdateThumbVFPPredicate(MCInst &MI) const {
 DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
                                                const MemoryObject &Region,
                                                uint64_t Address,
-                                               raw_ostream &os) const {
+                                               raw_ostream &os,
+                                               raw_ostream &cs) const {
   uint8_t bytes[4];
 
   assert((STI.getFeatureBits() & ARM::ModeThumb) &&
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 289d1921d1..0a0f1d07b5 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -51,7 +51,8 @@ void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
   OS << getRegisterName(RegNo);
 }
 
-void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
+void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
+                               StringRef Annot) {
   unsigned Opcode = MI->getOpcode();
 
   // Check for MOVs and print canonical forms, instead.
@@ -71,9 +72,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
 
     O << ", " << getRegisterName(MO2.getReg());
     assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
-
-    if (CommentStream) printAnnotations(MI, *CommentStream);
-
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
 
@@ -91,13 +90,12 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
       << ", " << getRegisterName(MO1.getReg());
 
     if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) {
-      if (CommentStream) printAnnotations(MI, *CommentStream);
+      if (CommentStream) printAnnotation(*CommentStream, Annot);
       return;
     }
 
     O << ", #" << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm()));
-
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
 
@@ -111,7 +109,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
       O << ".w";
     O << '\t';
     printRegisterList(MI, 4, O);
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
   if (Opcode == ARM::STR_PRE_IMM && MI->getOperand(2).getReg() == ARM::SP &&
@@ -119,7 +117,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
     O << '\t' << "push";
     printPredicateOperand(MI, 4, O);
     O << "\t{" << getRegisterName(MI->getOperand(1).getReg()) << "}";
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
 
@@ -132,7 +130,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
       O << ".w";
     O << '\t';
     printRegisterList(MI, 4, O);
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
   if (Opcode == ARM::LDR_POST_IMM && MI->getOperand(2).getReg() == ARM::SP &&
@@ -140,7 +138,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
     O << '\t' << "pop";
     printPredicateOperand(MI, 5, O);
     O << "\t{" << getRegisterName(MI->getOperand(0).getReg()) << "}";
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
 
@@ -152,7 +150,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
     printPredicateOperand(MI, 2, O);
     O << '\t';
     printRegisterList(MI, 4, O);
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
 
@@ -163,7 +161,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
     printPredicateOperand(MI, 2, O);
     O << '\t';
     printRegisterList(MI, 4, O);
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
 
@@ -182,7 +180,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
     if (Writeback) O << "!";
     O << ", ";
     printRegisterList(MI, 3, O);
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
 
@@ -191,12 +189,12 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
       MI->getOperand(1).getReg() == ARM::R8) {
     O << "\tnop";
     printPredicateOperand(MI, 2, O);
-    if (CommentStream) printAnnotations(MI, *CommentStream);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
 
   printInstruction(MI, O);
-  if (CommentStream) printAnnotations(MI, *CommentStream);
+  if (CommentStream) printAnnotation(*CommentStream, Annot);
 }
 
 void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
index fd4c9c46fa..a411e92f3b 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
@@ -25,7 +25,7 @@ class ARMInstPrinter : public MCInstPrinter {
 public:
     ARMInstPrinter(const MCAsmInfo &MAI, const MCSubtargetInfo &STI);
 
-  virtual void printInst(const MCInst *MI, raw_ostream &O);
+  virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
   virtual StringRef getOpcodeName(unsigned Opcode) const;
   virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
 
diff --git a/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp b/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp
index 999080a5b0..fd761f1ca8 100644
--- a/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp
+++ b/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.cpp
@@ -497,7 +497,8 @@ MCDisassembler::DecodeStatus MBlazeDisassembler::getInstruction(MCInst &instr,
                                         uint64_t &size,
                                         const MemoryObject &region,
                                         uint64_t address,
-                                        raw_ostream &vStream) const {
+                                        raw_ostream &vStream,
+                                        raw_ostream &cStream) const {
   // The machine instruction.
   uint32_t insn;
   uint64_t read;
diff --git a/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.h b/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.h
index 3d689dbcfe..0ac0d89efb 100644
--- a/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.h
+++ b/lib/Target/MBlaze/Disassembler/MBlazeDisassembler.h
@@ -44,7 +44,8 @@ public:
                       uint64_t &size,
                       const MemoryObject &region,
                       uint64_t address,
-                      raw_ostream &vStream) const;
+                      raw_ostream &vStream,
+                      raw_ostream &cStream) const;
 
   /// getEDInfo - See MCDisassembler.
   EDInstInfo *getEDInfo() const;
diff --git a/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp b/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp
index a7fd287990..7ece492c2f 100644
--- a/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp
+++ b/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp
@@ -25,8 +25,10 @@ using namespace llvm;
 // Include the auto-generated portion of the assembly writer.
 #include "MBlazeGenAsmWriter.inc"
 
-void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
+void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
+                                  StringRef Annot) {
   printInstruction(MI, O);
+  if (CommentStream) printAnnotation(*CommentStream, Annot);
 }
 
 void MBlazeInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
diff --git a/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h b/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h
index eacca410b9..570ab08a07 100644
--- a/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h
+++ b/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h
@@ -24,7 +24,7 @@ namespace llvm {
     MBlazeInstPrinter(const MCAsmInfo &MAI)
       : MCInstPrinter(MAI) {}
 
-    virtual void printInst(const MCInst *MI, raw_ostream &O);
+    virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
 
     // Autogenerated by tblgen.
     void printInstruction(const MCInst *MI, raw_ostream &O);
diff --git a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
index e10d4fe7ca..18151f4c6d 100644
--- a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
+++ b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
@@ -25,8 +25,10 @@ using namespace llvm;
 // Include the auto-generated portion of the assembly writer.
 #include "MSP430GenAsmWriter.inc"
 
-void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
+void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
+                                  StringRef Annot) {
   printInstruction(MI, O);
+  if (CommentStream) printAnnotation(*CommentStream, Annot);
 }
 
 void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
diff --git a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
index 82b342eccf..a1984a8aec 100644
--- a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
+++ b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
@@ -24,7 +24,7 @@ namespace llvm {
     MSP430InstPrinter(const MCAsmInfo &MAI)
         : MCInstPrinter(MAI) {}
 
-    virtual void printInst(const MCInst *MI, raw_ostream &O);
+    virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
 
     // Autogenerated by tblgen.
     void printInstruction(const MCInst *MI, raw_ostream &O);
diff --git a/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp b/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
index cb89929105..7c7dca2862 100644
--- a/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
+++ b/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
@@ -69,8 +69,10 @@ void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
   OS << '$' << LowercaseString(getRegisterName(RegNo));
 }
 
-void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
+void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
+                                StringRef Annot) {
   printInstruction(MI, O);
+  if (CommentStream) printAnnotation(*CommentStream, Annot);
 }
 
 void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
diff --git a/lib/Target/Mips/InstPrinter/MipsInstPrinter.h b/lib/Target/Mips/InstPrinter/MipsInstPrinter.h
index 76309a2471..5c1116538c 100644
--- a/lib/Target/Mips/InstPrinter/MipsInstPrinter.h
+++ b/lib/Target/Mips/InstPrinter/MipsInstPrinter.h
@@ -86,7 +86,7 @@ public:
   
   virtual StringRef getOpcodeName(unsigned Opcode) const;
   virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
-  virtual void printInst(const MCInst *MI, raw_ostream &O);
+  virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
   
 private:
   void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
diff --git a/lib/Target/PTX/PTXMCAsmStreamer.cpp b/lib/Target/PTX/PTXMCAsmStreamer.cpp
index 5003fb5b8f..4925cbfcb9 100644
--- a/lib/Target/PTX/PTXMCAsmStreamer.cpp
+++ b/lib/Target/PTX/PTXMCAsmStreamer.cpp
@@ -513,7 +513,7 @@ void PTXMCAsmStreamer::EmitInstruction(const MCInst &Inst) {
 
   // If we have an AsmPrinter, use that to print, otherwise print the MCInst.
   if (InstPrinter)
-    InstPrinter->printInst(&Inst, OS);
+    InstPrinter->printInst(&Inst, OS, "");
   else
     Inst.print(OS, &MAI);
   EmitEOL();
diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
index 8f34b19925..c22b13a447 100644
--- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
+++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
@@ -31,7 +31,8 @@ void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
   OS << getRegisterName(RegNo);
 }
 
-void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
+void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
+                               StringRef Annot) {
   // Check for slwi/srwi mnemonics.
   if (MI->getOpcode() == PPC::RLWINM) {
     unsigned char SH = MI->getOperand(2).getImm();
@@ -50,6 +51,8 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
       O << ", ";
       printOperand(MI, 1, O);
       O << ", " << (unsigned int)SH;
+
+      if (CommentStream) printAnnotation(*CommentStream, Annot);
       return;
     }
   }
@@ -60,6 +63,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
     printOperand(MI, 0, O);
     O << ", ";
     printOperand(MI, 1, O);
+    if (CommentStream) printAnnotation(*CommentStream, Annot);
     return;
   }
   
@@ -73,11 +77,13 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
       O << ", ";
       printOperand(MI, 1, O);
       O << ", " << (unsigned int)SH;
+      if (CommentStream) printAnnotation(*CommentStream, Annot);
       return;
     }
   }
   
   printInstruction(MI, O);
+  if (CommentStream) printAnnotation(*CommentStream, Annot);
 }
 
 
diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
index d022a4496e..4ed4b765c1 100644
--- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
+++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
@@ -32,7 +32,7 @@ public:
   }
   
   virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
-  virtual void printInst(const MCInst *MI, raw_ostream &O);
+  virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
   virtual StringRef getOpcodeName(unsigned Opcode) const;
   
   static const char *getInstructionName(unsigned Opcode);
diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp
index e5774bfd16..884e690efa 100644
--- a/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -114,7 +114,8 @@ X86GenericDisassembler::getInstruction(MCInst &instr,
                                        uint64_t &size,
                                        const MemoryObject &region,
                                        uint64_t address,
-                                       raw_ostream &vStream) const {
+                                       raw_ostream &vStream,
+                                       raw_ostream &cStream) const {
   InternalInstruction internalInstr;
   
   int ret = decodeInstruction(&internalInstr,
diff --git a/lib/Target/X86/Disassembler/X86Disassembler.h b/lib/Target/X86/Disassembler/X86Disassembler.h
index 419b870309..6ac9a0ff10 100644
--- a/lib/Target/X86/Disassembler/X86Disassembler.h
+++ b/lib/Target/X86/Disassembler/X86Disassembler.h
@@ -117,7 +117,8 @@ public:
                               uint64_t &size,
                               const MemoryObject &region,
                               uint64_t address,
-                              raw_ostream &vStream) const;
+                              raw_ostream &vStream,
+                              raw_ostream &cStream) const;
 
   /// getEDInfo - See MCDisassembler.
   EDInstInfo *getEDInfo() const;
diff --git a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
index 76a1da4959..1fefd57511 100644
--- a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
+++ b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
@@ -39,14 +39,15 @@ void X86ATTInstPrinter::printRegName(raw_ostream &OS,
   OS << '%' << getRegisterName(RegNo);
 }
 
-void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {
+void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
+                                  StringRef Annot) {
   // Try to print any aliases first.
   if (!printAliasInstr(MI, OS))
     printInstruction(MI, OS);
   
   // If verbose assembly is enabled, we can print some informative comments.
   if (CommentStream) {
-    printAnnotations(MI, *CommentStream);
+    printAnnotation(*CommentStream, Annot);
     EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
   }
 }
diff --git a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
index 5426e5cf38..0293869b0a 100644
--- a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
+++ b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
@@ -25,7 +25,7 @@ public:
   X86ATTInstPrinter(const MCAsmInfo &MAI);
   
   virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
-  virtual void printInst(const MCInst *MI, raw_ostream &OS);
+  virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot);
   virtual StringRef getOpcodeName(unsigned Opcode) const;
 
   // Autogenerated by tblgen, returns true if we successfully printed an
diff --git a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
index 6cca1d19b3..8ff3ac89e4 100644
--- a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
+++ b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
@@ -32,12 +32,13 @@ void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
   OS << getRegisterName(RegNo);
 }
 
-void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {
+void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
+                                    StringRef Annot) {
   printInstruction(MI, OS);
   
   // If verbose assembly is enabled, we can print some informative comments.
   if (CommentStream) {
-    printAnnotations(MI, *CommentStream);
+    printAnnotation(*CommentStream, Annot);
     EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
   }
 }
diff --git a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h
index e84a194001..6d5ec6226a 100644
--- a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h
+++ b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h
@@ -27,7 +27,7 @@ public:
     : MCInstPrinter(MAI) {}
 
   virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
-  virtual void printInst(const MCInst *MI, raw_ostream &OS);
+  virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot);
   virtual StringRef getOpcodeName(unsigned Opcode) const;
   
   // Autogenerated by tblgen.