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| author | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-09 21:31:46 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-09 21:31:46 +0000 |
| commit | 9a439affd74e7d4ad77dc7a28a16319d6e08db19 (patch) | |
| tree | a69b48d2651e6d037fc0dc89d58ca6ae964c7af7 /lib | |
| parent | 9db817fd0ce0949d0358f5cedfd9ca5a9f1726dd (diff) | |
| download | llvm-9a439affd74e7d4ad77dc7a28a16319d6e08db19.tar.gz llvm-9a439affd74e7d4ad77dc7a28a16319d6e08db19.tar.bz2 llvm-9a439affd74e7d4ad77dc7a28a16319d6e08db19.tar.xz | |
Mips32 does not reserve even-numbered floating point registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139412 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/MipsRegisterInfo.cpp | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp index 94e84d764d..c12b3560ee 100644 --- a/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/lib/Target/Mips/MipsRegisterInfo.cpp @@ -132,11 +132,6 @@ getReservedRegs(const MachineFunction &MF) const { Reserved.set(Mips::F31); Reserved.set(Mips::D15); - // SRV4 requires that odd register can't be used. - if (!Subtarget.isSingleFloat() && !Subtarget.isMips32()) - for (unsigned FReg=(Mips::F0)+1; FReg < Mips::F30; FReg+=2) - Reserved.set(FReg); - return Reserved; } |