R600/SI: Don't display the GDS bit.

It isn't actually used now, and probably never will be, plus it makes
tests less annoying. I also think SC prints GDS instructions as a
separate instruction name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204270 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 3 insertions, 3 deletions

diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index 57b36b3298..8973f2898c 100644
--- a/lib/Target/R600/SIInstrInfo.td
+++ b/lib/Target/R600/SIInstrInfo.td
@@ -395,7 +395,7 @@ class DS_Load_Helper <bits<8> op, string asm, RegisterClass regClass> : DS_1A <
   op,
   (outs regClass:$vdst),
   (ins i1imm:$gds, VReg_32:$addr, i16imm:$offset),
-  asm#" $gds, $vdst, $addr, $offset, [M0]",
+  asm#" $vdst, $addr, $offset, [M0]",
   []> {
   let data0 = 0;
   let data1 = 0;
@@ -407,7 +407,7 @@ class DS_Store_Helper <bits<8> op, string asm, RegisterClass regClass> : DS_1A <
   op,
   (outs),
   (ins i1imm:$gds, VReg_32:$addr, VReg_32:$data0, i16imm:$offset),
-  asm#" $gds, $addr, $data0, $offset [M0]",
+  asm#" $addr, $data0, $offset [M0]",
   []> {
   let data1 = 0;
   let mayStore = 1;
@@ -419,7 +419,7 @@ class DS_1A1D_RET <bits<8> op, string asm, RegisterClass rc> : DS_1A <
   op,
   (outs rc:$vdst),
   (ins i1imm:$gds, VReg_32:$addr, VReg_32:$data0, i16imm:$offset),
-  asm#" $gds, $vdst, $addr, $data0, $offset, [M0]",
+  asm#" $vdst, $addr, $data0, $offset, [M0]",
   []> {
 
   let data1 = 0;