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| author | Tim Northover <tnorthover@apple.com> | 2014-03-29 11:51:49 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-03-29 11:51:49 +0000 |
| commit | 9f36b6632420ab9b0d6c208e82e4c3c1217ec0ea (patch) | |
| tree | ec5538c58c4553c96e944af77d00ffecc735fffb /lib | |
| parent | 88ac45ffa7091f98c6cecd57d2589cc38c3522fc (diff) | |
| download | llvm-9f36b6632420ab9b0d6c208e82e4c3c1217ec0ea.tar.gz llvm-9f36b6632420ab9b0d6c208e82e4c3c1217ec0ea.tar.bz2 llvm-9f36b6632420ab9b0d6c208e82e4c3c1217ec0ea.tar.xz | |
ARM64: use 64-bit constant even on 32-bit machines
Another existing bot failure so no tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205093 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM64/ARM64ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM64/ARM64ISelLowering.cpp b/lib/Target/ARM64/ARM64ISelLowering.cpp index bfc91f98b6..76096088df 100644 --- a/lib/Target/ARM64/ARM64ISelLowering.cpp +++ b/lib/Target/ARM64/ARM64ISelLowering.cpp @@ -5158,7 +5158,7 @@ SDValue ARM64TargetLowering::LowerBUILD_VECTOR(SDValue Op, // and NEG) are passed through unmodified. This allows codegen patterns // for these operations to match. Special-purpose patterns will lower // these immediates to MOVIs if it proves necessary. - if (VT.isInteger() && (CnstVal == 0 || CnstVal == ~0UL)) + if (VT.isInteger() && (CnstVal == 0 || CnstVal == ~0ULL)) return Op; // The many faces of MOVI... |