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| author | Hao Liu <Hao.Liu@arm.com> | 2013-12-09 03:51:42 +0000 |
|---|---|---|
| committer | Hao Liu <Hao.Liu@arm.com> | 2013-12-09 03:51:42 +0000 |
| commit | a339740cb86e49a3300979b16f8c05df43bce637 (patch) | |
| tree | 789c1b2e1d6d855e51ef4a507a861468a5e48727 /lib | |
| parent | 2f3f02f6f531d1bf8f775f3556c37ccacd3b6133 (diff) | |
| download | llvm-a339740cb86e49a3300979b16f8c05df43bce637.tar.gz llvm-a339740cb86e49a3300979b16f8c05df43bce637.tar.bz2 llvm-a339740cb86e49a3300979b16f8c05df43bce637.tar.xz | |
[AArch64]Add missing pair intrinsics such as:
int32_t vminv_s32(int32x2_t a)
which should be compiled into SMINP Vd.2S,Vn.2S,Vm.2S
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196749 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/AArch64/AArch64InstrNEON.td | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64InstrNEON.td b/lib/Target/AArch64/AArch64InstrNEON.td index eb62c13df0..a273468041 100644 --- a/lib/Target/AArch64/AArch64InstrNEON.td +++ b/lib/Target/AArch64/AArch64InstrNEON.td @@ -978,6 +978,20 @@ defm FMULXvvv : NeonI_3VSame_SD_sizes<0b0, 0b0, 0b11011, "fmulx", int_aarch64_neon_vmulx, v2f32, v4f32, v2f64, 1>; +// Patterns to match llvm.aarch64.* intrinsic for +// ADDP, SMINP, UMINP, SMAXP, UMAXP having i32 as output +class Neon_VectorPair_v2i32_pattern<SDPatternOperator opnode, Instruction INST> + : Pat<(v1i32 (opnode (v2i32 VPR64:$Rn))), + (EXTRACT_SUBREG + (v2i32 (INST (v2i32 VPR64:$Rn), (v2i32 VPR64:$Rn))), + sub_32)>; + +def : Neon_VectorPair_v2i32_pattern<int_aarch64_neon_sminv, SMINPvvv_2S>; +def : Neon_VectorPair_v2i32_pattern<int_aarch64_neon_uminv, UMINPvvv_2S>; +def : Neon_VectorPair_v2i32_pattern<int_aarch64_neon_smaxv, SMAXPvvv_2S>; +def : Neon_VectorPair_v2i32_pattern<int_aarch64_neon_umaxv, UMAXPvvv_2S>; +def : Neon_VectorPair_v2i32_pattern<int_aarch64_neon_vaddv, ADDP_2S>; + // Vector Immediate Instructions multiclass neon_mov_imm_shift_asmoperands<string PREFIX> @@ -7695,6 +7709,11 @@ defm SADDLP : NeonI_PairwiseAdd<"saddlp", 0b0, 0b00010, defm UADDLP : NeonI_PairwiseAdd<"uaddlp", 0b1, 0b00010, int_arm_neon_vpaddlu>; +def : Pat<(v1i64 (int_aarch64_neon_saddlv (v2i32 VPR64:$Rn))), + (SADDLP2s1d $Rn)>; +def : Pat<(v1i64 (int_aarch64_neon_uaddlv (v2i32 VPR64:$Rn))), + (UADDLP2s1d $Rn)>; + multiclass NeonI_PairwiseAddAcc<string asmop, bit U, bits<5> opcode, SDPatternOperator Neon_Padd> { let Constraints = "$src = $Rd" in { |