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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-03-05 21:47:22 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-03-05 21:47:22 +0000 |
| commit | af0cc459bf5fdce42f723e575ae8c320752ac3e1 (patch) | |
| tree | b18e8e9899f493a3dec85de114323db1f5504549 /lib | |
| parent | 51da5c76311c5fbbf78d570006dd20bebdbda5ce (diff) | |
| download | llvm-af0cc459bf5fdce42f723e575ae8c320752ac3e1.tar.gz llvm-af0cc459bf5fdce42f723e575ae8c320752ac3e1.tar.bz2 llvm-af0cc459bf5fdce42f723e575ae8c320752ac3e1.tar.xz | |
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203013 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/R600/AMDGPUISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp index 9629b70b47..8d4895267b 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/R600/AMDGPUISelLowering.cpp @@ -613,9 +613,9 @@ SDValue AMDGPUTargetLowering::MergeVectorStore(const SDValue &Op, EVT MemVT = Store->getMemoryVT(); unsigned MemBits = MemVT.getSizeInBits(); - // Byte stores are really expensive, so if possible, try to pack - // 32-bit vector truncatating store into an i32 store. - // XXX: We could also handle optimize other vector bitwidths + // Byte stores are really expensive, so if possible, try to pack 32-bit vector + // truncating store into an i32 store. + // XXX: We could also handle optimize other vector bitwidths. if (!MemVT.isVector() || MemBits > 32) { return SDValue(); } |