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| author | Evan Cheng <evan.cheng@apple.com> | 2010-07-22 02:09:47 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-07-22 02:09:47 +0000 |
| commit | b1c857bb7b3d7bc187de4e97439eb212a8604bf0 (patch) | |
| tree | cff281770af99f5481c3c7ec7b0027c64b52adc3 /lib | |
| parent | 624e0b2be6a8db6187206090ee5bc8f24cf55cb7 (diff) | |
| download | llvm-b1c857bb7b3d7bc187de4e97439eb212a8604bf0.tar.gz llvm-b1c857bb7b3d7bc187de4e97439eb212a8604bf0.tar.bz2 llvm-b1c857bb7b3d7bc187de4e97439eb212a8604bf0.tar.xz | |
Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into:
mov pc, r1
.align 2
LJTI0_0_0:
.long LBB0_14
This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109076 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMConstantIslandPass.cpp | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index 65a3da6f16..50ba0d1760 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -366,6 +366,8 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) { if (isThumb && !HasFarJump && AFI->isLRSpilledForFarJump()) MadeChange |= UndoLRSpillRestore(); + DEBUG(errs() << '\n'; dumpBBs()); + BBSizes.clear(); BBOffsets.clear(); WaterList.clear(); @@ -509,8 +511,11 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &MF, case ARM::tBR_JTr: // A Thumb1 table jump may involve padding; for the offsets to // be right, functions containing these must be 4-byte aligned. + // tBR_JTr expands to a mov pc followed by .align 2 and then the jump + // table entries. So this code checks whether offset of tBR_JTr + 2 + // is aligned. MF.EnsureAlignment(2U); - if ((Offset+MBBSize)%4 != 0 || HasInlineAsm) + if ((Offset+MBBSize+2)%4 != 0 || HasInlineAsm) // FIXME: Add a pseudo ALIGN instruction instead. MBBSize += 2; // padding continue; // Does not get an entry in ImmBranches @@ -915,9 +920,12 @@ void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB, } // Thumb1 jump tables require padding. They should be at the end; // following unconditional branches are removed by AnalyzeBranch. + // tBR_JTr expands to a mov pc followed by .align 2 and then the jump + // table entries. So this code checks whether offset of tBR_JTr + 2 + // is aligned. MachineInstr *ThumbJTMI = prior(MBB->end()); if (ThumbJTMI->getOpcode() == ARM::tBR_JTr) { - unsigned NewMIOffset = GetOffsetOf(ThumbJTMI); + unsigned NewMIOffset = GetOffsetOf(ThumbJTMI) + 2; unsigned OldMIOffset = NewMIOffset - delta; if ((OldMIOffset%4) == 0 && (NewMIOffset%4) != 0) { // remove existing padding |