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| author | Bob Wilson <bob.wilson@apple.com> | 2010-09-22 22:27:30 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-09-22 22:27:30 +0000 |
| commit | b68987e4bff7cd269e0cb40b30851e9c2195db99 (patch) | |
| tree | 9c2c196109a09cb86162c16b24cde55388764d04 /lib | |
| parent | 59ff3c913449402ad5447bbe3ae6338402fb84b0 (diff) | |
| download | llvm-b68987e4bff7cd269e0cb40b30851e9c2195db99.tar.gz llvm-b68987e4bff7cd269e0cb40b30851e9c2195db99.tar.bz2 llvm-b68987e4bff7cd269e0cb40b30851e9c2195db99.tar.xz | |
Change VDUPLANE DAG combiner to just return the result instead of calling
CombineTo to avoid putting the result on the worklist. I don't think it makes
much difference for now, but it might help someday as we add more DAG
combine optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114595 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index dc2205b95c..dc68d3980f 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -4381,8 +4381,7 @@ static SDValue PerformBUILD_VECTORCombine(SDNode *N, SelectionDAG &DAG) { /// PerformVDUPLANECombine - Target-specific dag combine xforms for /// ARMISD::VDUPLANE. -static SDValue PerformVDUPLANECombine(SDNode *N, - TargetLowering::DAGCombinerInfo &DCI) { +static SDValue PerformVDUPLANECombine(SDNode *N, SelectionDAG &DAG) { // If the source is already a VMOVIMM or VMVNIMM splat, the VDUPLANE is // redundant. SDValue Op = N->getOperand(0); @@ -4404,8 +4403,7 @@ static SDValue PerformVDUPLANECombine(SDNode *N, if (EltSize > VT.getVectorElementType().getSizeInBits()) return SDValue(); - SDValue Res = DCI.DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), VT, Op); - return DCI.CombineTo(N, Res, false); + return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), VT, Op); } /// getVShiftImm - Check if this is a valid build_vector for the immediate @@ -4789,7 +4787,7 @@ SDValue ARMTargetLowering::PerformDAGCombine(SDNode *N, case ARMISD::VMOVRRD: return PerformVMOVRRDCombine(N, DCI); case ARMISD::VMOVDRR: return PerformVMOVDRRCombine(N, DCI.DAG); case ISD::BUILD_VECTOR: return PerformBUILD_VECTORCombine(N, DCI.DAG); - case ARMISD::VDUPLANE: return PerformVDUPLANECombine(N, DCI); + case ARMISD::VDUPLANE: return PerformVDUPLANECombine(N, DCI.DAG); case ISD::INTRINSIC_WO_CHAIN: return PerformIntrinsicCombine(N, DCI.DAG); case ISD::SHL: case ISD::SRA: |