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| author | Craig Topper <craig.topper@gmail.com> | 2011-11-09 09:37:21 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-11-09 09:37:21 +0000 |
| commit | b80ada98c50df226e210eabc9547101c5dee2181 (patch) | |
| tree | c352cef5d60f649b0058c585a16eaf88f041424a /lib | |
| parent | 94d80da4a0e84ab95e8855f97110317586500cf5 (diff) | |
| download | llvm-b80ada98c50df226e210eabc9547101c5dee2181.tar.gz llvm-b80ada98c50df226e210eabc9547101c5dee2181.tar.bz2 llvm-b80ada98c50df226e210eabc9547101c5dee2181.tar.xz | |
Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144179 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 16 |
2 files changed, 20 insertions, 4 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 8dcd637a96..102911fa42 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -3367,6 +3367,14 @@ static const unsigned ReplaceableInstrs[][3] = { { X86::VMOVUPSYmr, X86::VMOVUPDYmr, X86::VMOVDQUYmr }, { X86::VMOVUPSYrm, X86::VMOVUPDYrm, X86::VMOVDQUYrm }, { X86::VMOVNTPSYmr, X86::VMOVNTPDYmr, X86::VMOVNTDQYmr }, + { X86::VANDNPSYrm, X86::VANDNPDYrm, X86::VPANDNYrm }, + { X86::VANDNPSYrr, X86::VANDNPDYrr, X86::VPANDNYrr }, + { X86::VANDPSYrm, X86::VANDPDYrm, X86::VPANDYrm }, + { X86::VANDPSYrr, X86::VANDPDYrr, X86::VPANDYrr }, + { X86::VORPSYrm, X86::VORPDYrm, X86::VPORYrm }, + { X86::VORPSYrr, X86::VORPDYrr, X86::VPORYrr }, + { X86::VXORPSYrm, X86::VXORPDYrm, X86::VPXORYrm }, + { X86::VXORPSYrr, X86::VXORPDYrr, X86::VPXORYrr }, }; // FIXME: Some shuffle and unpack instructions have equivalents in different diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 15c6c4e7a7..4d4d7c06ab 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -135,10 +135,18 @@ bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { bool ShouldPrint = false; - if (OptLevel != CodeGenOpt::None && - (Subtarget.hasSSE2() || Subtarget.hasAVX())) { - PM.add(createExecutionDependencyFixPass(&X86::VR128RegClass)); - ShouldPrint = true; + if (OptLevel != CodeGenOpt::None) { + if (Subtarget.hasXMMInt()) { + PM.add(createExecutionDependencyFixPass(&X86::VR128RegClass)); + ShouldPrint = true; + } + if (Subtarget.hasAVX2()) { + // FIXME this should be turned on for just AVX, but the pass doesn't check + // that instructions are valid before replacing them and there are AVX2 + // integer instructions in the table. + PM.add(createExecutionDependencyFixPass(&X86::VR256RegClass)); + ShouldPrint = true; + } } if (Subtarget.hasAVX() && UseVZeroUpper) { |