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| author | Evan Cheng <evan.cheng@apple.com> | 2007-04-20 21:20:10 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-04-20 21:20:10 +0000 |
| commit | ba647becb98fbb01cc02aa6a522971a639ea2534 (patch) | |
| tree | a6675023ec5642494d0d0030b65dc34485d7291b /lib | |
| parent | 6120433e9e4748d72563125ed82108d7b66c7271 (diff) | |
| download | llvm-ba647becb98fbb01cc02aa6a522971a639ea2534.tar.gz llvm-ba647becb98fbb01cc02aa6a522971a639ea2534.tar.bz2 llvm-ba647becb98fbb01cc02aa6a522971a639ea2534.tar.xz | |
Specify S registers as D registers' sub-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36280 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.td b/lib/Target/ARM/ARMRegisterInfo.td index b46a952204..691514cd8e 100644 --- a/lib/Target/ARM/ARMRegisterInfo.td +++ b/lib/Target/ARM/ARMRegisterInfo.td @@ -13,10 +13,10 @@ //===----------------------------------------------------------------------===// // Registers are identified with 4-bit ID numbers. -class ARMReg<bits<4> num, string n, list<Register> aliases = []> : Register<n> { +class ARMReg<bits<4> num, string n, list<Register> subregs = []> : Register<n> { field bits<4> Num; let Namespace = "ARM"; - let Aliases = aliases; + let SubRegs = subregs; } class ARMFReg<bits<5> num, string n> : Register<n> { |