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| author | Jim Grosbach <grosbach@apple.com> | 2010-09-02 18:18:52 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-09-02 18:18:52 +0000 |
| commit | bb5a039b76cc2cc6de6a5b6bdd4ebf6aefd9d564 (patch) | |
| tree | abbd54b0d62814da4086552da2c96620c3ac94f8 /lib | |
| parent | e7c14162631d845ff3c465bfe2c6bdf2f59dba70 (diff) | |
| download | llvm-bb5a039b76cc2cc6de6a5b6bdd4ebf6aefd9d564.tar.gz llvm-bb5a039b76cc2cc6de6a5b6bdd4ebf6aefd9d564.tar.bz2 llvm-bb5a039b76cc2cc6de6a5b6bdd4ebf6aefd9d564.tar.xz | |
handle case where a register class is specified
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112842 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/TargetRegisterInfo.cpp | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index cdbe51fbdd..6addbab851 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -74,12 +74,11 @@ BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, BitVector Allocatable(NumRegs); if (RC) { getAllocatableSetForRC(MF, RC, Allocatable); - return Allocatable; - } - - for (TargetRegisterInfo::regclass_iterator I = regclass_begin(), + } else { + for (TargetRegisterInfo::regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I) - getAllocatableSetForRC(MF, *I, Allocatable); + getAllocatableSetForRC(MF, *I, Allocatable); + } // Mask out the reserved registers BitVector Reserved = getReservedRegs(MF); |