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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-10 19:00:20 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-10 19:00:20 +0000 |
| commit | bfd00e21b76fcbc51e005747b030af7eee7b10c5 (patch) | |
| tree | 62416431c2f273953253a4a064f7378dbfd2db27 /lib | |
| parent | 0ba78a91213a148f209faec0a0a579613136b37c (diff) | |
| download | llvm-bfd00e21b76fcbc51e005747b030af7eee7b10c5.tar.gz llvm-bfd00e21b76fcbc51e005747b030af7eee7b10c5.tar.bz2 llvm-bfd00e21b76fcbc51e005747b030af7eee7b10c5.tar.xz | |
R600: Handle fcopysign
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210564 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/R600/AMDGPUISelLowering.cpp | 7 | ||||
| -rw-r--r-- | lib/Target/R600/AMDGPUInstructions.td | 15 | ||||
| -rw-r--r-- | lib/Target/R600/AMDGPUSubtarget.h | 4 | ||||
| -rw-r--r-- | lib/Target/R600/EvergreenInstructions.td | 2 | ||||
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 2 |
5 files changed, 27 insertions, 3 deletions
diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp index 849f16919c..cb4f8cde1b 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/R600/AMDGPUISelLowering.cpp @@ -214,6 +214,12 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::UDIVREM, MVT::i64, Custom); setOperationAction(ISD::UREM, MVT::i32, Expand); + if (!Subtarget->hasBFI()) { + // fcopysign can be done in a single instruction with BFI. + setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); + setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); + } + static const MVT::SimpleValueType IntTypes[] = { MVT::v2i32, MVT::v4i32 }; @@ -260,6 +266,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::FNEG, VT, Expand); setOperationAction(ISD::SELECT, VT, Expand); setOperationAction(ISD::VSELECT, VT, Expand); + setOperationAction(ISD::FCOPYSIGN, VT, Expand); } setTargetDAGCombine(ISD::MUL); diff --git a/lib/Target/R600/AMDGPUInstructions.td b/lib/Target/R600/AMDGPUInstructions.td index 7d19c3db85..1345f79646 100644 --- a/lib/Target/R600/AMDGPUInstructions.td +++ b/lib/Target/R600/AMDGPUInstructions.td @@ -365,7 +365,7 @@ class DwordAddrPat<ValueType vt, RegisterClass rc> : Pat < // BFI_INT patterns -multiclass BFIPatterns <Instruction BFI_INT> { +multiclass BFIPatterns <Instruction BFI_INT, Instruction LoadImm32> { // Definition from ISA doc: // (y & x) | (z & ~x) @@ -381,6 +381,19 @@ multiclass BFIPatterns <Instruction BFI_INT> { (BFI_INT $x, $y, $z) >; + def : Pat < + (fcopysign f32:$src0, f32:$src1), + (BFI_INT (LoadImm32 0x7fffffff), $src0, $src1) + >; + + def : Pat < + (f64 (fcopysign f64:$src0, f64:$src1)), + (INSERT_SUBREG (INSERT_SUBREG (f64 (IMPLICIT_DEF)), + (i32 (EXTRACT_SUBREG $src0, sub0)), sub0), + (BFI_INT (LoadImm32 0x7fffffff), + (i32 (EXTRACT_SUBREG $src0, sub1)), + (i32 (EXTRACT_SUBREG $src1, sub1))), sub1) + >; } // SHA-256 Ma patterns diff --git a/lib/Target/R600/AMDGPUSubtarget.h b/lib/Target/R600/AMDGPUSubtarget.h index 1b041d6bd2..b3b3a1a0ed 100644 --- a/lib/Target/R600/AMDGPUSubtarget.h +++ b/lib/Target/R600/AMDGPUSubtarget.h @@ -72,6 +72,10 @@ public: return (getGeneration() >= EVERGREEN); } + bool hasBFI() const { + return (getGeneration() >= EVERGREEN); + } + bool hasBFM() const { return hasBFE(); } diff --git a/lib/Target/R600/EvergreenInstructions.td b/lib/Target/R600/EvergreenInstructions.td index 20654419a8..e09a0b2f78 100644 --- a/lib/Target/R600/EvergreenInstructions.td +++ b/lib/Target/R600/EvergreenInstructions.td @@ -295,7 +295,7 @@ def : Pat<(i32 (sext_inreg i32:$src, i8)), def : Pat<(i32 (sext_inreg i32:$src, i16)), (BFE_INT_eg i32:$src, (i32 ZERO), (MOV_IMM_I32 16))>; -defm : BFIPatterns <BFI_INT_eg>; +defm : BFIPatterns <BFI_INT_eg, MOV_IMM_I32>; def BFM_INT_eg : R600_2OP <0xA0, "BFM_INT", [(set i32:$dst, (AMDGPUbfm i32:$src0, i32:$src1))], diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index 07aba66c45..43ac47dad2 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -2112,7 +2112,7 @@ def : Pat < (V_MUL_HI_I32 $src0, $src1, (i32 0)) >; -defm : BFIPatterns <V_BFI_B32>; +defm : BFIPatterns <V_BFI_B32, S_MOV_B32>; def : ROTRPattern <V_ALIGNBIT_B32>; /********** ======================= **********/ |