diff options
author | Bill Wendling <isanbard@gmail.com> | 2010-12-01 21:54:50 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2010-12-01 21:54:50 +0000 |
commit | cf590263cd5c24ccf1d08cef612738d99cd980d9 (patch) | |
tree | f287dea603fdaab62a407de91ba1d1c4f072b53e /lib | |
parent | 5177f79c378b47e38bed5ac05ba4b597f31b864e (diff) | |
download | llvm-cf590263cd5c24ccf1d08cef612738d99cd980d9.tar.gz llvm-cf590263cd5c24ccf1d08cef612738d99cd980d9.tar.bz2 llvm-cf590263cd5c24ccf1d08cef612738d99cd980d9.tar.xz |
Add a post encoder method to the VFP instructions to convert them to the Thumb2
encoding if we're in that mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120608 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 2 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 6 | ||||
-rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 18 |
3 files changed, 22 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 797bedd2c6..e253a865a0 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -167,6 +167,8 @@ namespace { const { return 0; } unsigned NEONThumb2DupPostEncoder(const MachineInstr &MI,unsigned Val) const { return 0; } + unsigned VFPThumb2PostEncoder(const MachineInstr&MI, unsigned Val) + const { return 0; } unsigned getAdrLabelOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned Op) diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 6623445195..7948786f40 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -1101,6 +1101,7 @@ class VFPI<dag oops, dag iops, AddrMode am, SizeFlagVal sz, let InOperandList = !con(iops, (ins pred:$p)); let AsmString = !strconcat(opc, "${p}", asm); let Pattern = pattern; + let PostEncoderMethod = "VFPThumb2PostEncoder"; list<Predicate> Predicates = [HasVFP2]; } @@ -1115,13 +1116,16 @@ class VFPXI<dag oops, dag iops, AddrMode am, SizeFlagVal sz, let InOperandList = iops; let AsmString = asm; let Pattern = pattern; + let PostEncoderMethod = "VFPThumb2PostEncoder"; list<Predicate> Predicates = [HasVFP2]; } class VFPAI<dag oops, dag iops, Format f, InstrItinClass itin, string opc, string asm, list<dag> pattern> : VFPI<oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, f, itin, - opc, asm, "", pattern>; + opc, asm, "", pattern> { + let PostEncoderMethod = "VFPThumb2PostEncoder"; +} // ARM VFP addrmode5 loads and stores class ADI5<bits<4> opcod1, bits<2> opcod2, dag oops, dag iops, diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index 7a7864f75e..a20934dae2 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -249,9 +249,12 @@ public: unsigned NEONThumb2DataIPostEncoder(const MCInst &MI, unsigned EncodedValue) const; unsigned NEONThumb2LoadStorePostEncoder(const MCInst &MI, - unsigned EncodedValue) const; + unsigned EncodedValue) const; unsigned NEONThumb2DupPostEncoder(const MCInst &MI, - unsigned EncodedValue) const; + unsigned EncodedValue) const; + + unsigned VFPThumb2PostEncoder(const MCInst &MI, + unsigned EncodedValue) const; void EmitByte(unsigned char C, raw_ostream &OS) const { OS << (char)C; @@ -324,7 +327,16 @@ unsigned ARMMCCodeEmitter::NEONThumb2DupPostEncoder(const MCInst &MI, return EncodedValue; } - +/// VFPThumb2PostEncoder - Post-process encoded VFP instructions and rewrite +/// them to their Thumb2 form if we are currently in Thumb2 mode. +unsigned ARMMCCodeEmitter:: +VFPThumb2PostEncoder(const MCInst &MI, unsigned EncodedValue) const { + if (TM.getSubtarget<ARMSubtarget>().isThumb2()) { + EncodedValue &= 0x0FFFFFFF; + EncodedValue |= 0xE0000000; + } + return EncodedValue; +} /// getMachineOpValue - Return binary encoding of operand. If the machine /// operand requires relocation, record the relocation and return zero. |