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author | Chad Rosier <mcrosier@apple.com> | 2011-12-10 19:55:03 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2011-12-10 19:55:03 +0000 |
commit | d440f678fb0fd6a8735bc315bd6f63fe8a71e8bd (patch) | |
tree | 39a1508d080c9e4a243a23124f43f43d65fea1a4 /lib | |
parent | b435aa2c1de2ff28e51b1ce881e9f10f8b51d8e3 (diff) | |
download | llvm-d440f678fb0fd6a8735bc315bd6f63fe8a71e8bd.tar.gz llvm-d440f678fb0fd6a8735bc315bd6f63fe8a71e8bd.tar.bz2 llvm-d440f678fb0fd6a8735bc315bd6f63fe8a71e8bd.tar.xz |
Revert r146322 to appease buildbots. Original commit message:
Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for
FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Second
attempt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146328 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 229d8cf138..2045073fb6 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -468,23 +468,13 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) // v2f64 is legal so that QR subregs can be extracted as f64 elements, but // neither Neon nor VFP support any arithmetic operations on it. - // The same with v4f32. But keep in mind that vadd, vsub, vmul are natively - // supported for v4f32. setOperationAction(ISD::FADD, MVT::v2f64, Expand); setOperationAction(ISD::FSUB, MVT::v2f64, Expand); setOperationAction(ISD::FMUL, MVT::v2f64, Expand); - // FIXME: Code duplication: FDIV and FREM are expanded always, see - // ARMTargetLowering::addTypeForNEON method for details. setOperationAction(ISD::FDIV, MVT::v2f64, Expand); setOperationAction(ISD::FREM, MVT::v2f64, Expand); - // FIXME: Create unittest. - // In another words, find a way when "copysign" appears in DAG with vector - // operands. setOperationAction(ISD::FCOPYSIGN, MVT::v2f64, Expand); - // FIXME: Code duplication: SETCC has custom operation action, see - // ARMTargetLowering::addTypeForNEON method for details. setOperationAction(ISD::SETCC, MVT::v2f64, Expand); - // FIXME: Create unittest for FNEG and for FABS. setOperationAction(ISD::FNEG, MVT::v2f64, Expand); setOperationAction(ISD::FABS, MVT::v2f64, Expand); setOperationAction(ISD::FSQRT, MVT::v2f64, Expand); @@ -497,23 +487,11 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::FLOG10, MVT::v2f64, Expand); setOperationAction(ISD::FEXP, MVT::v2f64, Expand); setOperationAction(ISD::FEXP2, MVT::v2f64, Expand); - // FIXME: Create unittest for FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR. setOperationAction(ISD::FCEIL, MVT::v2f64, Expand); setOperationAction(ISD::FTRUNC, MVT::v2f64, Expand); setOperationAction(ISD::FRINT, MVT::v2f64, Expand); setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Expand); setOperationAction(ISD::FFLOOR, MVT::v2f64, Expand); - - setOperationAction(ISD::FSQRT, MVT::v4f32, Expand); - setOperationAction(ISD::FSIN, MVT::v4f32, Expand); - setOperationAction(ISD::FCOS, MVT::v4f32, Expand); - setOperationAction(ISD::FPOWI, MVT::v4f32, Expand); - setOperationAction(ISD::FPOW, MVT::v4f32, Expand); - setOperationAction(ISD::FLOG, MVT::v4f32, Expand); - setOperationAction(ISD::FLOG2, MVT::v4f32, Expand); - setOperationAction(ISD::FLOG10, MVT::v4f32, Expand); - setOperationAction(ISD::FEXP, MVT::v4f32, Expand); - setOperationAction(ISD::FEXP2, MVT::v4f32, Expand); // Neon does not support some operations on v1i64 and v2i64 types. setOperationAction(ISD::MUL, MVT::v1i64, Expand); |