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| author | Jim Grosbach <grosbach@apple.com> | 2010-10-29 23:21:03 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-29 23:21:03 +0000 |
| commit | d8a11c25fa64c152628cfcf5f9d36eb60242b302 (patch) | |
| tree | ca005705400f012c525cf4b9751ee30c462c5014 /lib | |
| parent | 0d2d2e92461781d11a8a055720e7ddfa4c8eee28 (diff) | |
| download | llvm-d8a11c25fa64c152628cfcf5f9d36eb60242b302.tar.gz llvm-d8a11c25fa64c152628cfcf5f9d36eb60242b302.tar.bz2 llvm-d8a11c25fa64c152628cfcf5f9d36eb60242b302.tar.xz | |
trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117740 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index ffe462f64e..8693ec3fd1 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -91,7 +91,7 @@ public: unsigned getImmMinusOneOpValue(const MCInst &MI, unsigned Op) const { return MI.getOperand(Op).getImm() - 1; } - + unsigned getNEONVcvtImm32OpValue(const MCInst &MI, unsigned Op) const { return 64 - MI.getOperand(Op).getImm(); } @@ -154,7 +154,7 @@ unsigned ARMMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO) const { if (MO.isReg()) { unsigned regno = getARMRegisterNumbering(MO.getReg()); - + // Q registers are encodes as 2x their register number. switch (MO.getReg()) { case ARM::Q0: case ARM::Q1: case ARM::Q2: case ARM::Q3: |