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author | Vincent Lejeune <vljn@ovi.com> | 2013-05-17 16:49:55 +0000 |
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committer | Vincent Lejeune <vljn@ovi.com> | 2013-05-17 16:49:55 +0000 |
commit | dcfcf1d1ffe72d9c25564a2b8b53763a28648e97 (patch) | |
tree | 2d1db1057bf5df1bdad0eb116a4e86c7663ad9fc /lib | |
parent | 9a9e936650bb82244f38dbddf6c4e427c2ae49f9 (diff) | |
download | llvm-dcfcf1d1ffe72d9c25564a2b8b53763a28648e97.tar.gz llvm-dcfcf1d1ffe72d9c25564a2b8b53763a28648e97.tar.bz2 llvm-dcfcf1d1ffe72d9c25564a2b8b53763a28648e97.tar.xz |
R600: Factorize Fetch size limit inside AMDGPUSubTarget
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182122 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/R600/AMDGPUSubtarget.cpp | 5 | ||||
-rw-r--r-- | lib/Target/R600/AMDGPUSubtarget.h | 2 | ||||
-rw-r--r-- | lib/Target/R600/R600ControlFlowFinalizer.cpp | 7 | ||||
-rw-r--r-- | lib/Target/R600/R600MachineScheduler.cpp | 12 |
4 files changed, 13 insertions, 13 deletions
diff --git a/lib/Target/R600/AMDGPUSubtarget.cpp b/lib/Target/R600/AMDGPUSubtarget.cpp index a7e1d7b6d5..6bfe17bbae 100644 --- a/lib/Target/R600/AMDGPUSubtarget.cpp +++ b/lib/Target/R600/AMDGPUSubtarget.cpp @@ -37,6 +37,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : ParseSubtargetFeatures(GPU, FS); DevName = GPU; Device = AMDGPUDeviceInfo::getDeviceFromName(DevName, this, Is64bit); + TexVTXClauseSize = (Device->getGeneration() >= AMDGPUDeviceInfo::HD4XXX)?16:8; } AMDGPUSubtarget::~AMDGPUSubtarget() { @@ -57,6 +58,10 @@ bool AMDGPUSubtarget::hasVertexCache() const { return HasVertexCache; } +short +AMDGPUSubtarget::getTexVTXClauseSize() const { + return TexVTXClauseSize; +} bool AMDGPUSubtarget::isTargetELF() const { return false; diff --git a/lib/Target/R600/AMDGPUSubtarget.h b/lib/Target/R600/AMDGPUSubtarget.h index b6501a4562..b9531bdcf5 100644 --- a/lib/Target/R600/AMDGPUSubtarget.h +++ b/lib/Target/R600/AMDGPUSubtarget.h @@ -37,6 +37,7 @@ private: bool DumpCode; bool R600ALUInst; bool HasVertexCache; + short TexVTXClauseSize; InstrItineraryData InstrItins; @@ -50,6 +51,7 @@ public: bool isOverride(AMDGPUDeviceInfo::Caps) const; bool is64bit() const; bool hasVertexCache() const; + short getTexVTXClauseSize() const; // Helper functions to simplify if statements bool isTargetELF() const; diff --git a/lib/Target/R600/R600ControlFlowFinalizer.cpp b/lib/Target/R600/R600ControlFlowFinalizer.cpp index cdda3dab8d..f1e07326e2 100644 --- a/lib/Target/R600/R600ControlFlowFinalizer.cpp +++ b/lib/Target/R600/R600ControlFlowFinalizer.cpp @@ -148,7 +148,7 @@ private: for (MachineBasicBlock::iterator E = MBB.end(); I != E; ++I) { if (IsTrivialInst(I)) continue; - if (AluInstCount > MaxFetchInst) + if (AluInstCount >= MaxFetchInst) break; if ((IsTex && !TII->usesTextureCache(I)) || (!IsTex && !TII->usesVertexCache(I))) @@ -316,10 +316,7 @@ public: TRI(TII->getRegisterInfo()), ST(tm.getSubtarget<AMDGPUSubtarget>()) { const AMDGPUSubtarget &ST = tm.getSubtarget<AMDGPUSubtarget>(); - if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD4XXX) - MaxFetchInst = 8; - else - MaxFetchInst = 16; + MaxFetchInst = ST.getTexVTXClauseSize(); } virtual bool runOnMachineFunction(MachineFunction &MF) { diff --git a/lib/Target/R600/R600MachineScheduler.cpp b/lib/Target/R600/R600MachineScheduler.cpp index a777142a9e..c6709a8dc3 100644 --- a/lib/Target/R600/R600MachineScheduler.cpp +++ b/lib/Target/R600/R600MachineScheduler.cpp @@ -41,11 +41,7 @@ void R600SchedStrategy::initialize(ScheduleDAGMI *dag) { const AMDGPUSubtarget &ST = DAG->TM.getSubtarget<AMDGPUSubtarget>(); - if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD5XXX) { - InstKindLimit[IDFetch] = 7; // 8 minus 1 for security - } else { - InstKindLimit[IDFetch] = 15; // 16 minus 1 for security - } + InstKindLimit[IDFetch] = ST.getTexVTXClauseSize(); } void R600SchedStrategy::MoveUnits(ReadyQueue *QSrc, ReadyQueue *QDst) @@ -67,9 +63,9 @@ SUnit* R600SchedStrategy::pickNode(bool &IsTopNode) { // check if we might want to switch current clause type bool AllowSwitchToAlu = (CurInstKind == IDOther) || - (CurEmitted > InstKindLimit[CurInstKind]) || + (CurEmitted >= InstKindLimit[CurInstKind]) || (Available[CurInstKind]->empty()); - bool AllowSwitchFromAlu = (CurEmitted > InstKindLimit[CurInstKind]) && + bool AllowSwitchFromAlu = (CurEmitted >= InstKindLimit[CurInstKind]) && (!Available[IDFetch]->empty() || !Available[IDOther]->empty()); if ((AllowSwitchToAlu && CurInstKind != IDAlu) || @@ -77,7 +73,7 @@ SUnit* R600SchedStrategy::pickNode(bool &IsTopNode) { // try to pick ALU SU = pickAlu(); if (SU) { - if (CurEmitted > InstKindLimit[IDAlu]) + if (CurEmitted >= InstKindLimit[IDAlu]) CurEmitted = 0; NextInstKind = IDAlu; } |