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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-04 13:54:30 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-04 13:54:30 +0000 |
| commit | e06bec47d646adb36c0bc552e8a0ed86d901d012 (patch) | |
| tree | 428a163432fed19b509b9c298ddaa4691e418052 /lib | |
| parent | 80a59df0e7b0c00c579827727f01fb5038f08ef7 (diff) | |
| download | llvm-e06bec47d646adb36c0bc552e8a0ed86d901d012.tar.gz llvm-e06bec47d646adb36c0bc552e8a0ed86d901d012.tar.bz2 llvm-e06bec47d646adb36c0bc552e8a0ed86d901d012.tar.xz | |
[mips][msa] Correct the behaviour of the COPY_FW pseudo on lanes 2 and 3.
Summary:
Previously, attempting to extract lanes 2 and 3 would actually extract lane 1.
The MSA CodeGen tests only covered lanes 0 and 1.
Differential Revision: http://llvm-reviews.chandlerc.com/D2935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202848 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/MipsSEISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsSEISelLowering.cpp b/lib/Target/Mips/MipsSEISelLowering.cpp index 516262f650..2d8ccf124b 100644 --- a/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/lib/Target/Mips/MipsSEISelLowering.cpp @@ -2755,7 +2755,7 @@ emitCOPY_FW(MachineInstr *MI, MachineBasicBlock *BB) const{ else { unsigned Wt = RegInfo.createVirtualRegister(&Mips::MSA128WRegClass); - BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wt).addReg(Ws).addImm(1); + BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wt).addReg(Ws).addImm(Lane); BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Fd).addReg(Wt, 0, Mips::sub_lo); } |