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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-01 15:00:44 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-01 15:00:44 +0000 |
| commit | e22c56d6d81b84d6f4ba24c2f5b0b203e7ddffe9 (patch) | |
| tree | 2cb11c268f8f3373416cf3fc1400a62ba4701ba3 /lib | |
| parent | 185ef05ad6fdcaad1e831020b1f88d0046dd15d6 (diff) | |
| download | llvm-e22c56d6d81b84d6f4ba24c2f5b0b203e7ddffe9.tar.gz llvm-e22c56d6d81b84d6f4ba24c2f5b0b203e7ddffe9.tar.bz2 llvm-e22c56d6d81b84d6f4ba24c2f5b0b203e7ddffe9.tar.xz | |
[SystemZ] Add comparisons of high words and memory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191777 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/SystemZ/SystemZInstrFormats.td | 16 | ||||
| -rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.td | 8 |
3 files changed, 30 insertions, 2 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td index 3b06732da1..353a0d3f73 100644 --- a/lib/Target/SystemZ/SystemZInstrFormats.td +++ b/lib/Target/SystemZ/SystemZInstrFormats.td @@ -1355,7 +1355,7 @@ class UnaryRIPseudo<SDPatternOperator operator, RegisterOperand cls, : Pseudo<(outs cls:$R1), (ins imm:$I2), [(set cls:$R1, (operator imm:$I2))]>; -// Like UnaryRXY, but expanded after RA depending on the choice of registers. +// Like UnaryRXY, but expanded after RA depending on the choice of register. class UnaryRXYPseudo<string key, SDPatternOperator operator, RegisterOperand cls, bits<5> bytes, AddressingMode mode = bdxaddr20only> @@ -1410,7 +1410,19 @@ class CompareRIPseudo<SDPatternOperator operator, RegisterOperand cls, Immediate imm> : Pseudo<(outs), (ins cls:$R1, imm:$I2), [(operator cls:$R1, imm:$I2)]>; -// Like StoreRXY, but expanded after RA depending on the choice of registers. +// Like CompareRXY, but expanded after RA depending on the choice of register. +class CompareRXYPseudo<SDPatternOperator operator, RegisterOperand cls, + SDPatternOperator load, bits<5> bytes, + AddressingMode mode = bdxaddr20only> + : Pseudo<(outs), (ins cls:$R1, mode:$XBD2), + [(operator cls:$R1, (load mode:$XBD2))]> { + let mayLoad = 1; + let Has20BitOffset = 1; + let HasIndex = 1; + let AccessBytes = bytes; +} + +// Like StoreRXY, but expanded after RA depending on the choice of register. class StoreRXYPseudo<SDPatternOperator operator, RegisterOperand cls, bits<5> bytes, AddressingMode mode = bdxaddr20only> : Pseudo<(outs), (ins cls:$R1, mode:$XBD2), diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp index 9b50a3c684..38d0a32d6f 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -974,6 +974,14 @@ SystemZInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const { expandRIPseudo(MI, SystemZ::CLFI, SystemZ::CLIH, false); return true; + case SystemZ::CMux: + expandRXYPseudo(MI, SystemZ::C, SystemZ::CHF); + return true; + + case SystemZ::CLMux: + expandRXYPseudo(MI, SystemZ::CL, SystemZ::CLHF); + return true; + case SystemZ::RISBMux: { bool DestIsHigh = isHighReg(MI->getOperand(0).getReg()); bool SrcIsHigh = isHighReg(MI->getOperand(2).getReg()); diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td index f7dbd094fa..a318aa1b73 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/lib/Target/SystemZ/SystemZInstrInfo.td @@ -1087,7 +1087,11 @@ let Defs = [CC], CCValues = 0xE in { // Comparison with memory. defm CH : CompareRXPair<"ch", 0x49, 0xE379, z_scmp, GR32, asextloadi16, 2>; + def CMux : CompareRXYPseudo<z_scmp, GRX32, load, 4>, + Requires<[FeatureHighWord]>; defm C : CompareRXPair<"c", 0x59, 0xE359, z_scmp, GR32, load, 4>; + def CHF : CompareRXY<"chf", 0xE3CD, z_scmp, GRH32, load, 4>, + Requires<[FeatureHighWord]>; def CGH : CompareRXY<"cgh", 0xE334, z_scmp, GR64, asextloadi16, 2>; def CGF : CompareRXY<"cgf", 0xE330, z_scmp, GR64, asextloadi32, 4>; def CG : CompareRXY<"cg", 0xE320, z_scmp, GR64, load, 8>; @@ -1121,7 +1125,11 @@ let Defs = [CC], CCValues = 0xE, IsLogical = 1 in { def CLGFI : CompareRIL<"clgfi", 0xC2E, z_ucmp, GR64, imm64zx32>; // Comparison with memory. + def CLMux : CompareRXYPseudo<z_ucmp, GRX32, load, 4>, + Requires<[FeatureHighWord]>; defm CL : CompareRXPair<"cl", 0x55, 0xE355, z_ucmp, GR32, load, 4>; + def CLHF : CompareRXY<"clhf", 0xE3CF, z_ucmp, GRH32, load, 4>, + Requires<[FeatureHighWord]>; def CLGF : CompareRXY<"clgf", 0xE331, z_ucmp, GR64, azextloadi32, 4>; def CLG : CompareRXY<"clg", 0xE321, z_ucmp, GR64, load, 8>; def CLHRL : CompareRILPC<"clhrl", 0xC67, z_ucmp, GR32, |