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| author | Vincent Lejeune <vljn@ovi.com> | 2014-05-10 19:18:39 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2014-05-10 19:18:39 +0000 |
| commit | e283f741337bd1ceb9a00c598ee6f6453d3f0129 (patch) | |
| tree | 879299b5c58a102a70d73e24933f540ebc0fc068 /lib | |
| parent | 3378ca7d5ccd79190b9d637c451ac5212f5562a9 (diff) | |
| download | llvm-e283f741337bd1ceb9a00c598ee6f6453d3f0129.tar.gz llvm-e283f741337bd1ceb9a00c598ee6f6453d3f0129.tar.bz2 llvm-e283f741337bd1ceb9a00c598ee6f6453d3f0129.tar.xz | |
R600/SI: Fold fabs/fneg into src input modifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208480 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/R600/SIISelLowering.cpp | 33 |
1 files changed, 31 insertions, 2 deletions
diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp index 466d24771c..da8aa5b7a9 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/R600/SIISelLowering.cpp @@ -1323,6 +1323,7 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node, // e64 version if available, -1 otherwise int OpcodeE64 = AMDGPU::getVOPe64(Opcode); const MCInstrDesc *DescE64 = OpcodeE64 == -1 ? nullptr : &TII->get(OpcodeE64); + int InputModifiers[3] = {0}; assert(!DescE64 || DescE64->getNumDefs() == NumDefs); @@ -1399,7 +1400,10 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node, } } - if (DescE64 && !Immediate) { + if (Immediate) + continue; + + if (DescE64) { // Test if it makes sense to switch to e64 encoding unsigned OtherRegClass = DescE64->OpInfo[Op].RegClass; @@ -1418,6 +1422,31 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node, DescE64 = nullptr; } } + + if (!DescE64 && !Promote2e64) + continue; + if (!Operand.isMachineOpcode()) + continue; + if (Operand.getMachineOpcode() == AMDGPU::FNEG_SI) { + Ops.pop_back(); + Ops.push_back(Operand.getOperand(0)); + InputModifiers[i] = 1; + Promote2e64 = true; + if (!DescE64) + continue; + Desc = DescE64; + DescE64 = 0; + } + else if (Operand.getMachineOpcode() == AMDGPU::FABS_SI) { + Ops.pop_back(); + Ops.push_back(Operand.getOperand(0)); + InputModifiers[i] = 2; + Promote2e64 = true; + if (!DescE64) + continue; + Desc = DescE64; + DescE64 = 0; + } } if (Promote2e64) { @@ -1425,7 +1454,7 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node, Ops.clear(); for (unsigned i = 0; i < OldOps.size(); ++i) { // src_modifier - Ops.push_back(DAG.getTargetConstant(0, MVT::i32)); + Ops.push_back(DAG.getTargetConstant(InputModifiers[i], MVT::i32)); Ops.push_back(OldOps[i]); } // Add the modifier flags while promoting |