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| author | Owen Anderson <resistor@mac.com> | 2011-11-02 17:41:23 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-11-02 17:41:23 +0000 |
| commit | e31b42a6f5598691498808673648211916bf4d0f (patch) | |
| tree | 6aa26cc90dbf81ebbb3d34a2f2098c8412184438 /lib | |
| parent | 5a83264fa26eb573ef25b2db0cafbeef3eeb54c8 (diff) | |
| download | llvm-e31b42a6f5598691498808673648211916bf4d0f.tar.gz llvm-e31b42a6f5598691498808673648211916bf4d0f.tar.bz2 llvm-e31b42a6f5598691498808673648211916bf4d0f.tar.xz | |
Register list operands are not allowed to contain only a single register. Alternate encodings are used in that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143552 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 6927d2d053..8dab153132 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1111,7 +1111,11 @@ static DecodeStatus DecodeRegListOperand(llvm::MCInst &Inst, unsigned Val, } // Empty register lists are not allowed. - if (CountPopulation_32(Val) == 0) return MCDisassembler::Fail; + uint32_t popcnt = CountPopulation_32(Val); + if (popcnt == 0) return MCDisassembler::Fail; + // and one-register lists are unpredictable. + else if (popcnt == 1) Check(S, MCDisassembler::SoftFail); + for (unsigned i = 0; i < 16; ++i) { if (Val & (1 << i)) { if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder))) |