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authorJack Carter <jack.carter@imgtec.com>2013-05-16 20:24:27 +0000
committerJack Carter <jack.carter@imgtec.com>2013-05-16 20:24:27 +0000
commite351865b65e92bea8ceeb32ad757d783d0ecea0f (patch)
tree79f57d33ed5bf0dc676bedb29f2c86915874d9eb /lib
parentd761004bfd61c96ad650b82ab262e220530ea6d9 (diff)
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Mips assembler: Add TwoOperandConstraint definitions
This patch removes alias definition for addiu $rs,$imm and instead uses the TwoOperandAliasConstraint field in the ArithLogicI instruction class. This way all instructions that inherit ArithLogicI class have the same macro defined. The usage examples are added to test files. Patch by Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182048 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/Mips/MipsInstrInfo.td3
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td
index b203b1e40b..950e075c8a 100644
--- a/lib/Target/Mips/MipsInstrInfo.td
+++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -391,6 +391,7 @@ class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
[(set RO:$rt, (OpNode RO:$rs, imm_type:$imm16))],
IIAlu, FrmI, opstr> {
let isReMaterializable = 1;
+ let TwoOperandAliasConstraint = "$rs = $rt";
}
// Arithmetic Multiply ADD/SUB
@@ -1098,8 +1099,6 @@ def : InstAlias<"mfc2 $rt, $rd",
(MFC2_3OP CPURegsOpnd:$rt, CPURegsOpnd:$rd, 0), 0>;
def : InstAlias<"mtc2 $rt, $rd",
(MTC2_3OP CPURegsOpnd:$rd, 0, CPURegsOpnd:$rt), 0>;
-def : InstAlias<"addiu $rs, $imm",
- (ADDiu CPURegsOpnd:$rs, CPURegsOpnd:$rs, simm16:$imm), 0>;
def : InstAlias<"bnez $rs,$offset",
(BNE CPURegsOpnd:$rs, ZERO, brtarget:$offset), 1>,
Requires<[NotMips64]>;