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authorReed Kotler <rkotler@mips.com>2012-10-26 16:18:19 +0000
committerReed Kotler <rkotler@mips.com>2012-10-26 16:18:19 +0000
commiteac3b65b00883ff8edaf0fbc4b973d5a3a9c455d (patch)
tree38901785294457bf5d8025bf2a5df24bc6f6cf67 /lib
parent6e43157b5d39a713d4061f97629bf9107c6d25e0 (diff)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166780 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/Mips/Mips16InstrInfo.td9
1 files changed, 7 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td
index 3721cc7ba0..feffddc02e 100644
--- a/lib/Target/Mips/Mips16InstrInfo.td
+++ b/lib/Target/Mips/Mips16InstrInfo.td
@@ -205,6 +205,11 @@ class FRR16_div_ins<bits<5> f, string asmstr, InstrItinClass itin> :
FRR16<f, (outs ), (ins CPU16Regs:$rx, CPU16Regs:$ry),
!strconcat(asmstr, "\t$$zero, $rx, $ry"), [], itin> ;
+class FUnaryRR16_ins<bits<5> f, string asmstr, InstrItinClass itin> :
+ FRR16<f, (outs CPU16Regs:$rx), (ins CPU16Regs:$ry),
+ !strconcat(asmstr, "\t$rx, $ry"), [], itin> ;
+
+
class FRR16_M_ins<bits<5> f, string asmstr,
InstrItinClass itin> :
FRR16<f, (outs CPU16Regs:$rx), (ins),
@@ -600,14 +605,14 @@ def MultuRxRyRz16: FMULT16_LO_ins<"multu", IIAlu> {
// Purpose: Negate
// To negate an integer value.
//
-def NegRxRy16: FRR16_ins<0b11101, "neg", IIAlu>;
+def NegRxRy16: FUnaryRR16_ins<0b11101, "neg", IIAlu>;
//
// Format: NOT rx, ry MIPS16e
// Purpose: Not
// To complement an integer value
//
-def NotRxRy16: FRR16_ins<0b01111, "not", IIAlu>;
+def NotRxRy16: FUnaryRR16_ins<0b01111, "not", IIAlu>;
//
// Format: OR rx, ry MIPS16e