diff options
author | Cameron McInally <cameron.mcinally@nyu.edu> | 2014-03-05 19:41:16 +0000 |
---|---|---|
committer | Cameron McInally <cameron.mcinally@nyu.edu> | 2014-03-05 19:41:16 +0000 |
commit | f3ff7c32f78f9fafe72a182837f42e14a12cff70 (patch) | |
tree | 56dd8da0812053106091cf782cc5107be968a622 /lib | |
parent | 986a2845923fb1c8af5aad4740362e1df65359ce (diff) | |
download | llvm-f3ff7c32f78f9fafe72a182837f42e14a12cff70.tar.gz llvm-f3ff7c32f78f9fafe72a182837f42e14a12cff70.tar.bz2 llvm-f3ff7c32f78f9fafe72a182837f42e14a12cff70.tar.xz |
Lower AVX v4i64->v4i32 truncate to one shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202996 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 5058fb9b7a..951d3ded99 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -9134,24 +9134,14 @@ SDValue X86TargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const { DAG.getIntPtrConstant(0)); } - // On AVX, v4i64 -> v4i32 becomes a sequence that uses PSHUFD and MOVLHPS. SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In, DAG.getIntPtrConstant(0)); SDValue OpHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In, DAG.getIntPtrConstant(2)); - OpLo = DAG.getNode(ISD::BITCAST, DL, MVT::v4i32, OpLo); OpHi = DAG.getNode(ISD::BITCAST, DL, MVT::v4i32, OpHi); - - // The PSHUFD mask: - static const int ShufMask1[] = {0, 2, 0, 0}; - SDValue Undef = DAG.getUNDEF(VT); - OpLo = DAG.getVectorShuffle(VT, DL, OpLo, Undef, ShufMask1); - OpHi = DAG.getVectorShuffle(VT, DL, OpHi, Undef, ShufMask1); - - // The MOVLHPS mask: - static const int ShufMask2[] = {0, 1, 4, 5}; - return DAG.getVectorShuffle(VT, DL, OpLo, OpHi, ShufMask2); + static const int ShufMask[] = {0, 2, 4, 6}; + return DAG.getVectorShuffle(VT, DL, OpLo, OpHi, ShufMask); } if ((VT == MVT::v8i16) && (InVT == MVT::v8i32)) { |