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| author | Ana Pazos <apazos@codeaurora.org> | 2013-12-24 00:40:10 +0000 |
|---|---|---|
| committer | Ana Pazos <apazos@codeaurora.org> | 2013-12-24 00:40:10 +0000 |
| commit | f5bfe97875de91fa9eabc23b0e8abb76965d1aa7 (patch) | |
| tree | ead236742802ef45e99bb4475672557fc6c0fe07 /lib | |
| parent | b8a316bfcbaa7322e254603545e9f5dcbd445a35 (diff) | |
| download | llvm-f5bfe97875de91fa9eabc23b0e8abb76965d1aa7.tar.gz llvm-f5bfe97875de91fa9eabc23b0e8abb76965d1aa7.tar.bz2 llvm-f5bfe97875de91fa9eabc23b0e8abb76965d1aa7.tar.xz | |
[AArch64 NEON] Fixed fused multiply negate add/sub patterns
The correct pattern matching should be:
- fnmadd is (-Ra) + (-Rn)*Rm which should be matched as:
fma (fneg node:$Rn), node:$Rm, (fneg node:$Ra) and as
(f32 (fsub (f32 (fneg FPR32:$Ra)), (f32 (fmul FPR32:$Rn, FPR32:$Rm))))
- fnmsub is (-Ra) + Rn*Rm which should be matched as
fma node:$Rn, node:$Rm, (fneg node:$Ra) and as
(f32 (fsub (f32 (fmul FPR32:$Rn, FPR32:$Rm)), FPR32:$Ra))))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197928 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/AArch64/AArch64InstrInfo.td | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/AArch64/AArch64InstrInfo.td b/lib/Target/AArch64/AArch64InstrInfo.td index 4c35b466f1..add11de67f 100644 --- a/lib/Target/AArch64/AArch64InstrInfo.td +++ b/lib/Target/AArch64/AArch64InstrInfo.td @@ -2172,9 +2172,9 @@ defm FSUB : A64I_fpdp2sizes<0b0011, "fsub", fsub>; def fmsub : PatFrag<(ops node:$Rn, node:$Rm, node:$Ra), (fma (fneg node:$Rn), node:$Rm, node:$Ra)>; -def fnmadd : PatFrag<(ops node:$Rn, node:$Rm, node:$Ra), - (fma node:$Rn, node:$Rm, (fneg node:$Ra))>; def fnmsub : PatFrag<(ops node:$Rn, node:$Rm, node:$Ra), + (fma node:$Rn, node:$Rm, (fneg node:$Ra))>; +def fnmadd : PatFrag<(ops node:$Rn, node:$Rm, node:$Ra), (fma (fneg node:$Rn), node:$Rm, (fneg node:$Ra))>; class A64I_fpdp3Impl<string asmop, RegisterClass FPR, ValueType VT, @@ -2202,18 +2202,18 @@ def : Pat<(f32 (fadd FPR32:$Ra, (f32 (fmul FPR32:$Rn, FPR32:$Rm)))), (FMADDssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>; def : Pat<(f32 (fsub FPR32:$Ra, (f32 (fmul FPR32:$Rn, FPR32:$Rm)))), (FMSUBssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>; -def : Pat<(f32 (fsub (f32 (fmul FPR32:$Rn, FPR32:$Rm)), FPR32:$Ra)), - (FNMADDssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>; def : Pat<(f32 (fsub (f32 (fneg FPR32:$Ra)), (f32 (fmul FPR32:$Rn, FPR32:$Rm)))), + (FNMADDssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>; +def : Pat<(f32 (fsub (f32 (fmul FPR32:$Rn, FPR32:$Rm)), FPR32:$Ra)), (FNMSUBssss FPR32:$Rn, FPR32:$Rm, FPR32:$Ra)>; def : Pat<(f64 (fadd FPR64:$Ra, (f64 (fmul FPR64:$Rn, FPR64:$Rm)))), (FMADDdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>; def : Pat<(f64 (fsub FPR64:$Ra, (f64 (fmul FPR64:$Rn, FPR64:$Rm)))), (FMSUBdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>; -def : Pat<(f64 (fsub (f64 (fmul FPR64:$Rn, FPR64:$Rm)), FPR64:$Ra)), - (FNMADDdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>; def : Pat<(f64 (fsub (f64 (fneg FPR64:$Ra)), (f64 (fmul FPR64:$Rn, FPR64:$Rm)))), + (FNMADDdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>; +def : Pat<(f64 (fsub (f64 (fmul FPR64:$Rn, FPR64:$Rm)), FPR64:$Ra)), (FNMSUBdddd FPR64:$Rn, FPR64:$Rm, FPR64:$Ra)>; } |