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authorBill Wendling <isanbard@gmail.com>2012-04-08 11:00:38 +0000
committerBill Wendling <isanbard@gmail.com>2012-04-08 11:00:38 +0000
commita0126afec8d81945006dec1dda4b55c848318f78 (patch)
tree4294604f08324c684d8381e071e35f6115f0e8f6 /test/Assembler
parent69b2c71abb3fa17612ebfb1fb804b656ea47ab8f (diff)
downloadllvm-a0126afec8d81945006dec1dda4b55c848318f78.tar.gz
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FileCheckize these testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154281 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Assembler')
-rw-r--r--test/Assembler/aggregate-constant-values.ll25
-rw-r--r--test/Assembler/bcwrap.ll6
-rw-r--r--test/Assembler/extractvalue-invalid-idx.ll4
-rw-r--r--test/Assembler/getelementptr_struct.ll4
-rw-r--r--test/Assembler/huge-array.ll4
-rw-r--r--test/Assembler/insertextractvalue.ll23
-rw-r--r--test/Assembler/insertvalue-invalid-idx.ll8
-rw-r--r--test/Assembler/invalid_cast.ll4
-rw-r--r--test/Assembler/invalid_cast2.ll4
-rw-r--r--test/Assembler/metadata.ll11
-rw-r--r--test/Assembler/vbool-cmp.ll17
-rw-r--r--test/Assembler/vector-cmp.ll10
-rw-r--r--test/Assembler/vector-select.ll12
-rw-r--r--test/Assembler/vector-shift.ll31
14 files changed, 116 insertions, 47 deletions
diff --git a/test/Assembler/aggregate-constant-values.ll b/test/Assembler/aggregate-constant-values.ll
index a37d03ebb3..d0aab81a4d 100644
--- a/test/Assembler/aggregate-constant-values.ll
+++ b/test/Assembler/aggregate-constant-values.ll
@@ -1,25 +1,48 @@
-; RUN: llvm-as < %s | llvm-dis | grep 7 | count 3
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
+; CHECK: @foo
+; CHECK: store { i32, i32 } { i32 7, i32 9 }, { i32, i32 }* %x
+; CHECK: ret
define void @foo({i32, i32}* %x) nounwind {
store {i32, i32}{i32 7, i32 9}, {i32, i32}* %x
ret void
}
+
+; CHECK: @foo_empty
+; CHECK: store {} zeroinitializer, {}* %x
+; CHECK: ret
define void @foo_empty({}* %x) nounwind {
store {}{}, {}* %x
ret void
}
+
+; CHECK: @bar
+; CHECK: store [2 x i32] [i32 7, i32 9], [2 x i32]* %x
+; CHECK: ret
define void @bar([2 x i32]* %x) nounwind {
store [2 x i32][i32 7, i32 9], [2 x i32]* %x
ret void
}
+
+; CHECK: @bar_empty
+; CHECK: store [0 x i32] undef, [0 x i32]* %x
+; CHECK: ret
define void @bar_empty([0 x i32]* %x) nounwind {
store [0 x i32][], [0 x i32]* %x
ret void
}
+
+; CHECK: @qux
+; CHECK: store <{ i32, i32 }> <{ i32 7, i32 9 }>, <{ i32, i32 }>* %x
+; CHECK: ret
define void @qux(<{i32, i32}>* %x) nounwind {
store <{i32, i32}><{i32 7, i32 9}>, <{i32, i32}>* %x
ret void
}
+
+; CHECK: @qux_empty
+; CHECK: store <{}> zeroinitializer, <{}>* %x
+; CHECK: ret
define void @qux_empty(<{}>* %x) nounwind {
store <{}><{}>, <{}>* %x
ret void
diff --git a/test/Assembler/bcwrap.ll b/test/Assembler/bcwrap.ll
index 859dc4bc80..4bec48cf63 100644
--- a/test/Assembler/bcwrap.ll
+++ b/test/Assembler/bcwrap.ll
@@ -1,9 +1,11 @@
; RUN: llvm-as < %s > %t
-; RUN: llvm-nm %t | grep foo
-; test for isBitcodeFile, llvm-nm must read from a file for this test
+; RUN: llvm-nm %t | FileCheck %s
+; Test for isBitcodeFile, llvm-nm must read from a file for this test.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin9.2.2"
+; CHECK: foo
+
define i32 @foo() {
ret i32 0
}
diff --git a/test/Assembler/extractvalue-invalid-idx.ll b/test/Assembler/extractvalue-invalid-idx.ll
index f9644eadbd..9a215f7194 100644
--- a/test/Assembler/extractvalue-invalid-idx.ll
+++ b/test/Assembler/extractvalue-invalid-idx.ll
@@ -1,6 +1,8 @@
-; RUN: not llvm-as < %s |& grep {invalid indices for extractvalue}
+; RUN: not llvm-as < %s |& FileCheck %s
; PR4170
+; CHECK: invalid indices for extractvalue
+
define void @test() {
entry:
extractvalue [0 x i32] undef, 0
diff --git a/test/Assembler/getelementptr_struct.ll b/test/Assembler/getelementptr_struct.ll
index c8779a6407..bfebf29bd5 100644
--- a/test/Assembler/getelementptr_struct.ll
+++ b/test/Assembler/getelementptr_struct.ll
@@ -1,6 +1,8 @@
-; RUN: not llvm-as < %s >/dev/null |& grep {invalid getelementptr indices}
+; RUN: not llvm-as < %s >/dev/null |& FileCheck %s
; Test the case of a incorrect indices type into struct
+; CHECK: invalid getelementptr indices
+
%RT = type { i8 , [10 x [20 x i32]], i8 }
%ST = type { i32, double, %RT }
diff --git a/test/Assembler/huge-array.ll b/test/Assembler/huge-array.ll
index e080947b99..a1abf87971 100644
--- a/test/Assembler/huge-array.ll
+++ b/test/Assembler/huge-array.ll
@@ -1,5 +1,7 @@
-; RUN: llvm-as < %s | llvm-dis | grep 18446744073709551615 | count 2
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; CHECK: define [18446744073709551615 x i8]* @foo() {
+; CHECK: ret [18446744073709551615 x i8]* null
define [18446744073709551615 x i8]* @foo() {
ret [18446744073709551615 x i8]* null
}
diff --git a/test/Assembler/insertextractvalue.ll b/test/Assembler/insertextractvalue.ll
index 2f5521fba8..88e4855bec 100644
--- a/test/Assembler/insertextractvalue.ll
+++ b/test/Assembler/insertextractvalue.ll
@@ -1,7 +1,13 @@
-; RUN: llvm-as < %s | llvm-dis > %t
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
; RUN: grep insertvalue %t | count 1
; RUN: grep extractvalue %t | count 1
+; CHECK: @foo
+; CHECK-NEXT: load
+; CHECK-NEXT: extractvalue
+; CHECK-NEXT: insertvalue
+; CHECK-NEXT: store
+; CHECK-NEXT: ret
define float @foo({{i32},{float, double}}* %p) nounwind {
%t = load {{i32},{float, double}}* %p
%s = extractvalue {{i32},{float, double}} %t, 1, 0
@@ -9,21 +15,34 @@ define float @foo({{i32},{float, double}}* %p) nounwind {
store {{i32},{float, double}} %r, {{i32},{float, double}}* %p
ret float %s
}
+
+; CHECK: @bar
+; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } { i32 4 }, { float, double } { float 4.000000e+00, double 2.000000e+01 } }, { { i32 }, { float, double } }* %p
+; CHECK-NEXT: ret float 7.000000e+00
define float @bar({{i32},{float, double}}* %p) nounwind {
store {{i32},{float, double}} insertvalue ({{i32},{float, double}}{{i32}{i32 4},{float, double}{float 4.0, double 5.0}}, double 20.0, 1, 1), {{i32},{float, double}}* %p
ret float extractvalue ({{i32},{float, double}}{{i32}{i32 3},{float, double}{float 7.0, double 9.0}}, 1, 0)
}
+
+; CHECK: @car
+; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } undef, { float, double } { float undef, double 2.000000e+01 } }, { { i32 }, { float, double } }* %p
+; CHECK-NEXT: ret float undef
define float @car({{i32},{float, double}}* %p) nounwind {
store {{i32},{float, double}} insertvalue ({{i32},{float, double}} undef, double 20.0, 1, 1), {{i32},{float, double}}* %p
ret float extractvalue ({{i32},{float, double}} undef, 1, 0)
}
+
+; CHECK: @dar
+; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } zeroinitializer, { float, double } { float 0.000000e+00, double 2.000000e+01 } }, { { i32 }, { float, double } }* %p
+; CHECK-NEXT: ret float 0.000000e+00
define float @dar({{i32},{float, double}}* %p) nounwind {
store {{i32},{float, double}} insertvalue ({{i32},{float, double}} zeroinitializer, double 20.0, 1, 1), {{i32},{float, double}}* %p
ret float extractvalue ({{i32},{float, double}} zeroinitializer, 1, 0)
}
-
; PR4963
+; CHECK: @test57
+; CHECK-NEXT: ret <{ i32, i32 }> <{ i32 0, i32 4 }>
define <{ i32, i32 }> @test57() {
ret <{ i32, i32 }> insertvalue (<{ i32, i32 }> zeroinitializer, i32 4, 1)
}
diff --git a/test/Assembler/insertvalue-invalid-idx.ll b/test/Assembler/insertvalue-invalid-idx.ll
index 86e7258cc5..355d4e8c10 100644
--- a/test/Assembler/insertvalue-invalid-idx.ll
+++ b/test/Assembler/insertvalue-invalid-idx.ll
@@ -1,7 +1,9 @@
-; RUN: not llvm-as < %s |& grep {invalid indices for insertvalue}
+; RUN: not llvm-as < %s |& FileCheck %s
+
+; CHECK: invalid indices for insertvalue
define void @test() {
entry:
- insertvalue [0 x i32] undef, i32 0, 0
- ret void
+ insertvalue [0 x i32] undef, i32 0, 0
+ ret void
}
diff --git a/test/Assembler/invalid_cast.ll b/test/Assembler/invalid_cast.ll
index c5b082b6b8..f682835724 100644
--- a/test/Assembler/invalid_cast.ll
+++ b/test/Assembler/invalid_cast.ll
@@ -1,4 +1,6 @@
-; RUN: not llvm-as < %s |& grep {invalid cast opcode}
+; RUN: not llvm-as < %s |& FileCheck %s
+
+; CHECK: invalid cast opcode for cast from '<4 x i64>' to '<3 x i8>'
define <3 x i8> @foo(<4 x i64> %x) {
%y = trunc <4 x i64> %x to <3 x i8>
diff --git a/test/Assembler/invalid_cast2.ll b/test/Assembler/invalid_cast2.ll
index f2e7c414e7..a01b935629 100644
--- a/test/Assembler/invalid_cast2.ll
+++ b/test/Assembler/invalid_cast2.ll
@@ -1,4 +1,6 @@
-; RUN: not llvm-as < %s |& grep {invalid cast opcode}
+; RUN: not llvm-as < %s |& FileCheck %s
+
+; CHECK: invalid cast opcode for cast from '<4 x i64>' to 'i8'
define i8 @foo(<4 x i64> %x) {
%y = trunc <4 x i64> %x to i8
diff --git a/test/Assembler/metadata.ll b/test/Assembler/metadata.ll
index 50f27b4eb4..56888fd703 100644
--- a/test/Assembler/metadata.ll
+++ b/test/Assembler/metadata.ll
@@ -1,12 +1,12 @@
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {ret void, !bar !1, !foo !0}
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
+
+; CHECK: @test
+; CHECK: ret void, !bar !1, !foo !0
define void @test() {
add i32 2, 1, !bar !0
add i32 1, 2, !foo !1
-
call void @llvm.dbg.func.start(metadata !"foo")
-
extractvalue {{i32, i32}, i32} undef, 0, 1, !foo !0
-
ret void, !foo !0, !bar !1
}
@@ -15,8 +15,5 @@ define void @test() {
declare void @llvm.dbg.func.start(metadata) nounwind readnone
-
!foo = !{ !0 }
!bar = !{ !1 }
-
-; !foo = !{ !0, !"foo" }
diff --git a/test/Assembler/vbool-cmp.ll b/test/Assembler/vbool-cmp.ll
index ac8fb29362..e652d2ff3b 100644
--- a/test/Assembler/vbool-cmp.ll
+++ b/test/Assembler/vbool-cmp.ll
@@ -1,15 +1,18 @@
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {icmp slt}
-; rudimentary test of fcmp/icmp on vectors returning vector of bool
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
+; Rudimentary test of fcmp/icmp on vectors returning vector of bool
+; CHECK: @ffoo
+; CHECK: fcmp olt <4 x float> %a, %b
define <4 x i1> @ffoo(<4 x float> %a, <4 x float> %b) nounwind {
entry:
- %cmp = fcmp olt <4 x float> %a, %b ; <4 x i1> [#uses=1]
- ret <4 x i1> %cmp
+ %cmp = fcmp olt <4 x float> %a, %b ; <4 x i1> [#uses=1]
+ ret <4 x i1> %cmp
}
+; CHECK: @ifoo
+; CHECK: icmp slt <4 x i32> %a, %b
define <4 x i1> @ifoo(<4 x i32> %a, <4 x i32> %b) nounwind {
entry:
- %cmp = icmp slt <4 x i32> %a, %b ; <4 x i1> [#uses=1]
- ret <4 x i1> %cmp
+ %cmp = icmp slt <4 x i32> %a, %b ; <4 x i1> [#uses=1]
+ ret <4 x i1> %cmp
}
-
diff --git a/test/Assembler/vector-cmp.ll b/test/Assembler/vector-cmp.ll
index 688369bb62..6e3894ca10 100644
--- a/test/Assembler/vector-cmp.ll
+++ b/test/Assembler/vector-cmp.ll
@@ -1,16 +1,16 @@
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {global.*icmp slt}
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
; PR2317
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin9.2.2"
+; CHECK: @1 = global <4 x i1> <i1 icmp slt (i32 ptrtoint (i32* @B to i32), i32 1), i1 true, i1 false, i1 true>
+
define <4 x i1> @foo(<4 x float> %a, <4 x float> %b) nounwind {
entry:
- %cmp = fcmp olt <4 x float> %a, %b ; <4 x i32> [#uses=1]
- ret <4 x i1> %cmp
+ %cmp = fcmp olt <4 x float> %a, %b ; <4 x i32> [#uses=1]
+ ret <4 x i1> %cmp
}
global <4 x i1> icmp slt ( <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> )
-
@B = external global i32
-
global <4 x i1> icmp slt ( <4 x i32> <i32 ptrtoint (i32 * @B to i32), i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> )
diff --git a/test/Assembler/vector-select.ll b/test/Assembler/vector-select.ll
index 87af602aaf..ae8358abf9 100644
--- a/test/Assembler/vector-select.ll
+++ b/test/Assembler/vector-select.ll
@@ -1,11 +1,11 @@
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep select
-; rudimentary test of select on vectors returning vector of bool
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
+; Rudimentary test of select on vectors returning vector of bool
-define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b,
- <4 x i1> %cond) nounwind {
+; CHECK: @foo
+; CHECK: select <4 x i1> %cond, <4 x i32> %a, <4 x i32> %b
+define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b, <4 x i1> %cond) nounwind {
entry:
- %cmp = select <4 x i1> %cond, <4 x i32> %a, <4 x i32> %b
- ; <4 x i32> [#uses=1]
+ %cmp = select <4 x i1> %cond, <4 x i32> %a, <4 x i32> %b
ret <4 x i32> %cmp
}
diff --git a/test/Assembler/vector-shift.ll b/test/Assembler/vector-shift.ll
index 1850e66e8e..6a6531b4d2 100644
--- a/test/Assembler/vector-shift.ll
+++ b/test/Assembler/vector-shift.ll
@@ -1,32 +1,45 @@
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep shl | count 1
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep ashr | count 1
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep lshr | count 1
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
+; CHECK: @foo
+; CHECK: shl
define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b) nounwind {
entry:
- %cmp = shl <4 x i32> %a, %b ; <4 x i32> [#uses=1]
- ret <4 x i32> %cmp
+ %cmp = shl <4 x i32> %a, %b ; <4 x i32> [#uses=1]
+ ret <4 x i32> %cmp
}
+; CHECK: @bar
+; CHECK: lshr
define <4 x i32> @bar(<4 x i32> %a, <4 x i32> %b) nounwind {
entry:
- %cmp = lshr <4 x i32> %a, %b ; <4 x i32> [#uses=1]
- ret <4 x i32> %cmp
+ %cmp = lshr <4 x i32> %a, %b ; <4 x i32> [#uses=1]
+ ret <4 x i32> %cmp
}
+; CHECK: @baz
+; CHECK: ashr
define <4 x i32> @baz(<4 x i32> %a, <4 x i32> %b) nounwind {
entry:
- %cmp = ashr <4 x i32> %a, %b ; <4 x i32> [#uses=1]
- ret <4 x i32> %cmp
+ %cmp = ashr <4 x i32> %a, %b ; <4 x i32> [#uses=1]
+ ret <4 x i32> %cmp
}
; Constant expressions: these should be folded.
+
+; CHECK: @foo_ce
+; CHECK: ret <2 x i64> <i64 40, i64 192>
define <2 x i64> @foo_ce() nounwind {
ret <2 x i64> shl (<2 x i64> <i64 5, i64 6>, <2 x i64> <i64 3, i64 5>)
}
+
+; CHECK: @bar_ce
+; CHECK: ret <2 x i64> <i64 42, i64 11>
define <2 x i64> @bar_ce() nounwind {
ret <2 x i64> lshr (<2 x i64> <i64 340, i64 380>, <2 x i64> <i64 3, i64 5>)
}
+
+; CHECK: baz_ce
+; CHECK: ret <2 x i64> <i64 71, i64 12>
define <2 x i64> @baz_ce() nounwind {
ret <2 x i64> ashr (<2 x i64> <i64 573, i64 411>, <2 x i64> <i64 3, i64 5>)
}