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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2014-03-02 15:26:36 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2014-03-02 15:26:36 +0000 |
| commit | 3de6ee1ae69644ccdbb2f2f4550817de00719e90 (patch) | |
| tree | 945a6fd6cdc831a5a629cf9beec1651882a61a77 /test/Bitcode/miscInstructions.3.2.ll | |
| parent | a4f0aad95182b7c6dec35fea0d1dc4ef3046b5ab (diff) | |
| download | llvm-3de6ee1ae69644ccdbb2f2f4550817de00719e90.tar.gz llvm-3de6ee1ae69644ccdbb2f2f4550817de00719e90.tar.bz2 llvm-3de6ee1ae69644ccdbb2f2f4550817de00719e90.tar.xz | |
Ensure bitcode encoding of instructions and their operands stays stable.
This includes instructions that relate to memory access (load/store/GEP), comparison instructions and calls.
Work was done by lama.saba@intel.com.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202647 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Bitcode/miscInstructions.3.2.ll')
| -rw-r--r-- | test/Bitcode/miscInstructions.3.2.ll | 126 |
1 files changed, 126 insertions, 0 deletions
diff --git a/test/Bitcode/miscInstructions.3.2.ll b/test/Bitcode/miscInstructions.3.2.ll new file mode 100644 index 0000000000..bceae20109 --- /dev/null +++ b/test/Bitcode/miscInstructions.3.2.ll @@ -0,0 +1,126 @@ +; RUN: llvm-dis < %s.bc| FileCheck %s
+
+; miscInstructions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
+; The test checks that LLVM does not misread miscellaneous instructions of
+; older bitcode files.
+
+define void @icmp(i32 %x1, i32 %x2, i32* %ptr1, i32* %ptr2, <2 x i32> %vec1, <2 x i32> %vec2){
+entry:
+; CHECK: %res1 = icmp eq i32 %x1, %x2
+ %res1 = icmp eq i32 %x1, %x2
+
+; CHECK-NEXT: %res2 = icmp ne i32 %x1, %x2
+ %res2 = icmp ne i32 %x1, %x2
+
+; CHECK-NEXT: %res3 = icmp ugt i32 %x1, %x2
+ %res3 = icmp ugt i32 %x1, %x2
+
+; CHECK-NEXT: %res4 = icmp uge i32 %x1, %x2
+ %res4 = icmp uge i32 %x1, %x2
+
+; CHECK-NEXT: %res5 = icmp ult i32 %x1, %x2
+ %res5 = icmp ult i32 %x1, %x2
+
+; CHECK-NEXT: %res6 = icmp ule i32 %x1, %x2
+ %res6 = icmp ule i32 %x1, %x2
+
+; CHECK-NEXT: %res7 = icmp sgt i32 %x1, %x2
+ %res7 = icmp sgt i32 %x1, %x2
+
+; CHECK-NEXT: %res8 = icmp sge i32 %x1, %x2
+ %res8 = icmp sge i32 %x1, %x2
+
+; CHECK-NEXT: %res9 = icmp slt i32 %x1, %x2
+ %res9 = icmp slt i32 %x1, %x2
+
+; CHECK-NEXT: %res10 = icmp sle i32 %x1, %x2
+ %res10 = icmp sle i32 %x1, %x2
+
+; CHECK-NEXT: %res11 = icmp eq i32* %ptr1, %ptr2
+ %res11 = icmp eq i32* %ptr1, %ptr2
+
+; CHECK-NEXT: %res12 = icmp eq <2 x i32> %vec1, %vec2
+ %res12 = icmp eq <2 x i32> %vec1, %vec2
+
+ ret void
+}
+
+
+define void @fcmp(float %x1, float %x2, <2 x float> %vec1, <2 x float> %vec2){
+entry:
+; CHECK: %res1 = fcmp oeq float %x1, %x2
+ %res1 = fcmp oeq float %x1, %x2
+
+; CHECK-NEXT: %res2 = fcmp one float %x1, %x2
+ %res2 = fcmp one float %x1, %x2
+
+; CHECK-NEXT: %res3 = fcmp ugt float %x1, %x2
+ %res3 = fcmp ugt float %x1, %x2
+
+; CHECK-NEXT: %res4 = fcmp uge float %x1, %x2
+ %res4 = fcmp uge float %x1, %x2
+
+; CHECK-NEXT: %res5 = fcmp ult float %x1, %x2
+ %res5 = fcmp ult float %x1, %x2
+
+; CHECK-NEXT: %res6 = fcmp ule float %x1, %x2
+ %res6 = fcmp ule float %x1, %x2
+
+; CHECK-NEXT: %res7 = fcmp ogt float %x1, %x2
+ %res7 = fcmp ogt float %x1, %x2
+
+; CHECK-NEXT: %res8 = fcmp oge float %x1, %x2
+ %res8 = fcmp oge float %x1, %x2
+
+; CHECK-NEXT: %res9 = fcmp olt float %x1, %x2
+ %res9 = fcmp olt float %x1, %x2
+
+; CHECK-NEXT: %res10 = fcmp ole float %x1, %x2
+ %res10 = fcmp ole float %x1, %x2
+
+; CHECK-NEXT: %res11 = fcmp ord float %x1, %x2
+ %res11 = fcmp ord float %x1, %x2
+
+; CHECK-NEXT: %res12 = fcmp ueq float %x1, %x2
+ %res12 = fcmp ueq float %x1, %x2
+
+; CHECK-NEXT: %res13 = fcmp une float %x1, %x2
+ %res13 = fcmp une float %x1, %x2
+
+; CHECK-NEXT: %res14 = fcmp uno float %x1, %x2
+ %res14 = fcmp uno float %x1, %x2
+
+; CHECK-NEXT: %res15 = fcmp true float %x1, %x2
+ %res15 = fcmp true float %x1, %x2
+
+; CHECK-NEXT: %res16 = fcmp false float %x1, %x2
+ %res16 = fcmp false float %x1, %x2
+
+; CHECK-NEXT: %res17 = fcmp oeq <2 x float> %vec1, %vec2
+ %res17 = fcmp oeq <2 x float> %vec1, %vec2
+
+ ret void
+}
+
+declare i32 @printf(i8* noalias nocapture, ...)
+
+define void @call(i32 %x, i8* %msg ){
+entry:
+
+; CHECK: %res1 = call i32 @test(i32 %x)
+ %res1 = call i32 @test(i32 %x)
+
+; CHECK-NEXT: %res2 = tail call i32 @test(i32 %x)
+ %res2 = tail call i32 @test(i32 %x)
+
+; CHECK-NEXT: %res3 = call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)
+ %res3 = call i32 (i8*, ...)* @printf(i8* %msg, i32 12, i8 42)
+
+ ret void
+}
+
+define i32 @test(i32 %x){
+entry:
+
+ ret i32 %x
+}
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