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author | Kevin Qin <Kevin.Qin@arm.com> | 2013-12-12 02:19:13 +0000 |
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committer | Kevin Qin <Kevin.Qin@arm.com> | 2013-12-12 02:19:13 +0000 |
commit | 24802f3f82bade50b686efb368cfb01a8bb0264f (patch) | |
tree | 5db475e58849e377cfaf61e7b44a0f717702a804 /test/CodeGen/AArch64/neon-copy.ll | |
parent | 41a300757171e208a1367d423feca80db0f40364 (diff) | |
download | llvm-24802f3f82bade50b686efb368cfb01a8bb0264f.tar.gz llvm-24802f3f82bade50b686efb368cfb01a8bb0264f.tar.bz2 llvm-24802f3f82bade50b686efb368cfb01a8bb0264f.tar.xz |
Fix Incorrect CHECK message [0-31]+ in test case.
In regular expression, [0-31]+ equals to [0-3]+, not the number from
0 to 31. So change it to [0-9]+.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197113 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64/neon-copy.ll')
-rw-r--r-- | test/CodeGen/AArch64/neon-copy.ll | 98 |
1 files changed, 49 insertions, 49 deletions
diff --git a/test/CodeGen/AArch64/neon-copy.ll b/test/CodeGen/AArch64/neon-copy.ll index e18530e6ff..da14495010 100644 --- a/test/CodeGen/AArch64/neon-copy.ll +++ b/test/CodeGen/AArch64/neon-copy.ll @@ -2,269 +2,269 @@ define <16 x i8> @ins16bw(<16 x i8> %tmp1, i8 %tmp2) { -;CHECK: ins {{v[0-31]+}}.b[15], {{w[0-31]+}} +;CHECK: ins {{v[0-9]+}}.b[15], {{w[0-9]+}} %tmp3 = insertelement <16 x i8> %tmp1, i8 %tmp2, i32 15 ret <16 x i8> %tmp3 } define <8 x i16> @ins8hw(<8 x i16> %tmp1, i16 %tmp2) { -;CHECK: ins {{v[0-31]+}}.h[6], {{w[0-31]+}} +;CHECK: ins {{v[0-9]+}}.h[6], {{w[0-9]+}} %tmp3 = insertelement <8 x i16> %tmp1, i16 %tmp2, i32 6 ret <8 x i16> %tmp3 } define <4 x i32> @ins4sw(<4 x i32> %tmp1, i32 %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[2], {{w[0-31]+}} +;CHECK: ins {{v[0-9]+}}.s[2], {{w[0-9]+}} %tmp3 = insertelement <4 x i32> %tmp1, i32 %tmp2, i32 2 ret <4 x i32> %tmp3 } define <2 x i64> @ins2dw(<2 x i64> %tmp1, i64 %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[1], {{x[0-31]+}} +;CHECK: ins {{v[0-9]+}}.d[1], {{x[0-9]+}} %tmp3 = insertelement <2 x i64> %tmp1, i64 %tmp2, i32 1 ret <2 x i64> %tmp3 } define <8 x i8> @ins8bw(<8 x i8> %tmp1, i8 %tmp2) { -;CHECK: ins {{v[0-31]+}}.b[5], {{w[0-31]+}} +;CHECK: ins {{v[0-9]+}}.b[5], {{w[0-9]+}} %tmp3 = insertelement <8 x i8> %tmp1, i8 %tmp2, i32 5 ret <8 x i8> %tmp3 } define <4 x i16> @ins4hw(<4 x i16> %tmp1, i16 %tmp2) { -;CHECK: ins {{v[0-31]+}}.h[3], {{w[0-31]+}} +;CHECK: ins {{v[0-9]+}}.h[3], {{w[0-9]+}} %tmp3 = insertelement <4 x i16> %tmp1, i16 %tmp2, i32 3 ret <4 x i16> %tmp3 } define <2 x i32> @ins2sw(<2 x i32> %tmp1, i32 %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{w[0-31]+}} +;CHECK: ins {{v[0-9]+}}.s[1], {{w[0-9]+}} %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1 ret <2 x i32> %tmp3 } define <16 x i8> @ins16b16(<16 x i8> %tmp1, <16 x i8> %tmp2) { -;CHECK: ins {{v[0-31]+}}.b[15], {{v[0-31]+}}.b[2] +;CHECK: ins {{v[0-9]+}}.b[15], {{v[0-9]+}}.b[2] %tmp3 = extractelement <16 x i8> %tmp1, i32 2 %tmp4 = insertelement <16 x i8> %tmp2, i8 %tmp3, i32 15 ret <16 x i8> %tmp4 } define <8 x i16> @ins8h8(<8 x i16> %tmp1, <8 x i16> %tmp2) { -;CHECK: ins {{v[0-31]+}}.h[7], {{v[0-31]+}}.h[2] +;CHECK: ins {{v[0-9]+}}.h[7], {{v[0-9]+}}.h[2] %tmp3 = extractelement <8 x i16> %tmp1, i32 2 %tmp4 = insertelement <8 x i16> %tmp2, i16 %tmp3, i32 7 ret <8 x i16> %tmp4 } define <4 x i32> @ins4s4(<4 x i32> %tmp1, <4 x i32> %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{v[0-31]+}}.s[2] +;CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[2] %tmp3 = extractelement <4 x i32> %tmp1, i32 2 %tmp4 = insertelement <4 x i32> %tmp2, i32 %tmp3, i32 1 ret <4 x i32> %tmp4 } define <2 x i64> @ins2d2(<2 x i64> %tmp1, <2 x i64> %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[1], {{v[0-31]+}}.d[0] +;CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] %tmp3 = extractelement <2 x i64> %tmp1, i32 0 %tmp4 = insertelement <2 x i64> %tmp2, i64 %tmp3, i32 1 ret <2 x i64> %tmp4 } define <4 x float> @ins4f4(<4 x float> %tmp1, <4 x float> %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{v[0-31]+}}.s[2] +;CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[2] %tmp3 = extractelement <4 x float> %tmp1, i32 2 %tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 1 ret <4 x float> %tmp4 } define <2 x double> @ins2df2(<2 x double> %tmp1, <2 x double> %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[1], {{v[0-31]+}}.d[0] +;CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] %tmp3 = extractelement <2 x double> %tmp1, i32 0 %tmp4 = insertelement <2 x double> %tmp2, double %tmp3, i32 1 ret <2 x double> %tmp4 } define <16 x i8> @ins8b16(<8 x i8> %tmp1, <16 x i8> %tmp2) { -;CHECK: ins {{v[0-31]+}}.b[15], {{v[0-31]+}}.b[2] +;CHECK: ins {{v[0-9]+}}.b[15], {{v[0-9]+}}.b[2] %tmp3 = extractelement <8 x i8> %tmp1, i32 2 %tmp4 = insertelement <16 x i8> %tmp2, i8 %tmp3, i32 15 ret <16 x i8> %tmp4 } define <8 x i16> @ins4h8(<4 x i16> %tmp1, <8 x i16> %tmp2) { -;CHECK: ins {{v[0-31]+}}.h[7], {{v[0-31]+}}.h[2] +;CHECK: ins {{v[0-9]+}}.h[7], {{v[0-9]+}}.h[2] %tmp3 = extractelement <4 x i16> %tmp1, i32 2 %tmp4 = insertelement <8 x i16> %tmp2, i16 %tmp3, i32 7 ret <8 x i16> %tmp4 } define <4 x i32> @ins2s4(<2 x i32> %tmp1, <4 x i32> %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{v[0-31]+}}.s[1] +;CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[1] %tmp3 = extractelement <2 x i32> %tmp1, i32 1 %tmp4 = insertelement <4 x i32> %tmp2, i32 %tmp3, i32 1 ret <4 x i32> %tmp4 } define <2 x i64> @ins1d2(<1 x i64> %tmp1, <2 x i64> %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[1], {{v[0-31]+}}.d[0] +;CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] %tmp3 = extractelement <1 x i64> %tmp1, i32 0 %tmp4 = insertelement <2 x i64> %tmp2, i64 %tmp3, i32 1 ret <2 x i64> %tmp4 } define <4 x float> @ins2f4(<2 x float> %tmp1, <4 x float> %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{v[0-31]+}}.s[1] +;CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[1] %tmp3 = extractelement <2 x float> %tmp1, i32 1 %tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 1 ret <4 x float> %tmp4 } define <2 x double> @ins1f2(<1 x double> %tmp1, <2 x double> %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[1], {{v[0-31]+}}.d[0] +;CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0] %tmp3 = extractelement <1 x double> %tmp1, i32 0 %tmp4 = insertelement <2 x double> %tmp2, double %tmp3, i32 1 ret <2 x double> %tmp4 } define <8 x i8> @ins16b8(<16 x i8> %tmp1, <8 x i8> %tmp2) { -;CHECK: ins {{v[0-31]+}}.b[7], {{v[0-31]+}}.b[2] +;CHECK: ins {{v[0-9]+}}.b[7], {{v[0-9]+}}.b[2] %tmp3 = extractelement <16 x i8> %tmp1, i32 2 %tmp4 = insertelement <8 x i8> %tmp2, i8 %tmp3, i32 7 ret <8 x i8> %tmp4 } define <4 x i16> @ins8h4(<8 x i16> %tmp1, <4 x i16> %tmp2) { -;CHECK: ins {{v[0-31]+}}.h[3], {{v[0-31]+}}.h[2] +;CHECK: ins {{v[0-9]+}}.h[3], {{v[0-9]+}}.h[2] %tmp3 = extractelement <8 x i16> %tmp1, i32 2 %tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 3 ret <4 x i16> %tmp4 } define <2 x i32> @ins4s2(<4 x i32> %tmp1, <2 x i32> %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{v[0-31]+}}.s[2] +;CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[2] %tmp3 = extractelement <4 x i32> %tmp1, i32 2 %tmp4 = insertelement <2 x i32> %tmp2, i32 %tmp3, i32 1 ret <2 x i32> %tmp4 } define <1 x i64> @ins2d1(<2 x i64> %tmp1, <1 x i64> %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[0], {{v[0-31]+}}.d[0] +;CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[0] %tmp3 = extractelement <2 x i64> %tmp1, i32 0 %tmp4 = insertelement <1 x i64> %tmp2, i64 %tmp3, i32 0 ret <1 x i64> %tmp4 } define <2 x float> @ins4f2(<4 x float> %tmp1, <2 x float> %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{v[0-31]+}}.s[2] +;CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[2] %tmp3 = extractelement <4 x float> %tmp1, i32 2 %tmp4 = insertelement <2 x float> %tmp2, float %tmp3, i32 1 ret <2 x float> %tmp4 } define <1 x double> @ins2f1(<2 x double> %tmp1, <1 x double> %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[0], {{v[0-31]+}}.d[0] +;CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[0] %tmp3 = extractelement <2 x double> %tmp1, i32 0 %tmp4 = insertelement <1 x double> %tmp2, double %tmp3, i32 0 ret <1 x double> %tmp4 } define <8 x i8> @ins8b8(<8 x i8> %tmp1, <8 x i8> %tmp2) { -;CHECK: ins {{v[0-31]+}}.b[4], {{v[0-31]+}}.b[2] +;CHECK: ins {{v[0-9]+}}.b[4], {{v[0-9]+}}.b[2] %tmp3 = extractelement <8 x i8> %tmp1, i32 2 %tmp4 = insertelement <8 x i8> %tmp2, i8 %tmp3, i32 4 ret <8 x i8> %tmp4 } define <4 x i16> @ins4h4(<4 x i16> %tmp1, <4 x i16> %tmp2) { -;CHECK: ins {{v[0-31]+}}.h[3], {{v[0-31]+}}.h[2] +;CHECK: ins {{v[0-9]+}}.h[3], {{v[0-9]+}}.h[2] %tmp3 = extractelement <4 x i16> %tmp1, i32 2 %tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 3 ret <4 x i16> %tmp4 } define <2 x i32> @ins2s2(<2 x i32> %tmp1, <2 x i32> %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{v[0-31]+}}.s[0] +;CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] %tmp3 = extractelement <2 x i32> %tmp1, i32 0 %tmp4 = insertelement <2 x i32> %tmp2, i32 %tmp3, i32 1 ret <2 x i32> %tmp4 } define <1 x i64> @ins1d1(<1 x i64> %tmp1, <1 x i64> %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[0], {{v[0-31]+}}.d[0] +;CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[0] %tmp3 = extractelement <1 x i64> %tmp1, i32 0 %tmp4 = insertelement <1 x i64> %tmp2, i64 %tmp3, i32 0 ret <1 x i64> %tmp4 } define <2 x float> @ins2f2(<2 x float> %tmp1, <2 x float> %tmp2) { -;CHECK: ins {{v[0-31]+}}.s[1], {{v[0-31]+}}.s[0] +;CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0] %tmp3 = extractelement <2 x float> %tmp1, i32 0 %tmp4 = insertelement <2 x float> %tmp2, float %tmp3, i32 1 ret <2 x float> %tmp4 } define <1 x double> @ins1df1(<1 x double> %tmp1, <1 x double> %tmp2) { -;CHECK: ins {{v[0-31]+}}.d[0], {{v[0-31]+}}.d[0] +;CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[0] %tmp3 = extractelement <1 x double> %tmp1, i32 0 %tmp4 = insertelement <1 x double> %tmp2, double %tmp3, i32 0 ret <1 x double> %tmp4 } define i32 @umovw16b(<16 x i8> %tmp1) { -;CHECK: umov {{w[0-31]+}}, {{v[0-31]+}}.b[8] +;CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.b[8] %tmp3 = extractelement <16 x i8> %tmp1, i32 8 %tmp4 = zext i8 %tmp3 to i32 ret i32 %tmp4 } define i32 @umovw8h(<8 x i16> %tmp1) { -;CHECK: umov {{w[0-31]+}}, {{v[0-31]+}}.h[2] +;CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.h[2] %tmp3 = extractelement <8 x i16> %tmp1, i32 2 %tmp4 = zext i16 %tmp3 to i32 ret i32 %tmp4 } define i32 @umovw4s(<4 x i32> %tmp1) { -;CHECK: umov {{w[0-31]+}}, {{v[0-31]+}}.s[2] +;CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.s[2] %tmp3 = extractelement <4 x i32> %tmp1, i32 2 ret i32 %tmp3 } define i64 @umovx2d(<2 x i64> %tmp1) { -;CHECK: umov {{x[0-31]+}}, {{v[0-31]+}}.d[0] +;CHECK: umov {{x[0-9]+}}, {{v[0-9]+}}.d[0] %tmp3 = extractelement <2 x i64> %tmp1, i32 0 ret i64 %tmp3 } define i32 @umovw8b(<8 x i8> %tmp1) { -;CHECK: umov {{w[0-31]+}}, {{v[0-31]+}}.b[7] +;CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.b[7] %tmp3 = extractelement <8 x i8> %tmp1, i32 7 %tmp4 = zext i8 %tmp3 to i32 ret i32 %tmp4 } define i32 @umovw4h(<4 x i16> %tmp1) { -;CHECK: umov {{w[0-31]+}}, {{v[0-31]+}}.h[2] +;CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.h[2] %tmp3 = extractelement <4 x i16> %tmp1, i32 2 %tmp4 = zext i16 %tmp3 to i32 ret i32 %tmp4 } define i32 @umovw2s(<2 x i32> %tmp1) { -;CHECK: umov {{w[0-31]+}}, {{v[0-31]+}}.s[1] +;CHECK: umov {{w[0-9]+}}, {{v[0-9]+}}.s[1] %tmp3 = extractelement <2 x i32> %tmp1, i32 1 ret i32 %tmp3 } define i64 @umovx1d(<1 x i64> %tmp1) { -;CHECK: fmov {{x[0-31]+}}, {{d[0-31]+}} +;CHECK: fmov {{x[0-9]+}}, {{d[0-9]+}} %tmp3 = extractelement <1 x i64> %tmp1, i32 0 ret i64 %tmp3 } define i32 @smovw16b(<16 x i8> %tmp1) { -;CHECK: smov {{w[0-31]+}}, {{v[0-31]+}}.b[8] +;CHECK: smov {{w[0-9]+}}, {{v[0-9]+}}.b[8] %tmp3 = extractelement <16 x i8> %tmp1, i32 8 %tmp4 = sext i8 %tmp3 to i32 %tmp5 = add i32 5, %tmp4 @@ -272,7 +272,7 @@ define i32 @smovw16b(<16 x i8> %tmp1) { } define i32 @smovw8h(<8 x i16> %tmp1) { -;CHECK: smov {{w[0-31]+}}, {{v[0-31]+}}.h[2] +;CHECK: smov {{w[0-9]+}}, {{v[0-9]+}}.h[2] %tmp3 = extractelement <8 x i16> %tmp1, i32 2 %tmp4 = sext i16 %tmp3 to i32 %tmp5 = add i32 5, %tmp4 @@ -280,28 +280,28 @@ define i32 @smovw8h(<8 x i16> %tmp1) { } define i32 @smovx16b(<16 x i8> %tmp1) { -;CHECK: smov {{x[0-31]+}}, {{v[0-31]+}}.b[8] +;CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.b[8] %tmp3 = extractelement <16 x i8> %tmp1, i32 8 %tmp4 = sext i8 %tmp3 to i32 ret i32 %tmp4 } define i32 @smovx8h(<8 x i16> %tmp1) { -;CHECK: smov {{x[0-31]+}}, {{v[0-31]+}}.h[2] +;CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.h[2] %tmp3 = extractelement <8 x i16> %tmp1, i32 2 %tmp4 = sext i16 %tmp3 to i32 ret i32 %tmp4 } define i64 @smovx4s(<4 x i32> %tmp1) { -;CHECK: smov {{x[0-31]+}}, {{v[0-31]+}}.s[2] +;CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.s[2] %tmp3 = extractelement <4 x i32> %tmp1, i32 2 %tmp4 = sext i32 %tmp3 to i64 ret i64 %tmp4 } define i32 @smovw8b(<8 x i8> %tmp1) { -;CHECK: smov {{w[0-31]+}}, {{v[0-31]+}}.b[4] +;CHECK: smov {{w[0-9]+}}, {{v[0-9]+}}.b[4] %tmp3 = extractelement <8 x i8> %tmp1, i32 4 %tmp4 = sext i8 %tmp3 to i32 %tmp5 = add i32 5, %tmp4 @@ -309,7 +309,7 @@ define i32 @smovw8b(<8 x i8> %tmp1) { } define i32 @smovw4h(<4 x i16> %tmp1) { -;CHECK: smov {{w[0-31]+}}, {{v[0-31]+}}.h[2] +;CHECK: smov {{w[0-9]+}}, {{v[0-9]+}}.h[2] %tmp3 = extractelement <4 x i16> %tmp1, i32 2 %tmp4 = sext i16 %tmp3 to i32 %tmp5 = add i32 5, %tmp4 @@ -317,21 +317,21 @@ define i32 @smovw4h(<4 x i16> %tmp1) { } define i32 @smovx8b(<8 x i8> %tmp1) { -;CHECK: smov {{x[0-31]+}}, {{v[0-31]+}}.b[6] +;CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.b[6] %tmp3 = extractelement <8 x i8> %tmp1, i32 6 %tmp4 = sext i8 %tmp3 to i32 ret i32 %tmp4 } define i32 @smovx4h(<4 x i16> %tmp1) { -;CHECK: smov {{x[0-31]+}}, {{v[0-31]+}}.h[2] +;CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.h[2] %tmp3 = extractelement <4 x i16> %tmp1, i32 2 %tmp4 = sext i16 %tmp3 to i32 ret i32 %tmp4 } define i64 @smovx2s(<2 x i32> %tmp1) { -;CHECK: smov {{x[0-31]+}}, {{v[0-31]+}}.s[1] +;CHECK: smov {{x[0-9]+}}, {{v[0-9]+}}.s[1] %tmp3 = extractelement <2 x i32> %tmp1, i32 1 %tmp4 = sext i32 %tmp3 to i64 ret i64 %tmp4 |