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author | Kevin Qin <Kevin.Qin@arm.com> | 2014-01-24 07:53:04 +0000 |
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committer | Kevin Qin <Kevin.Qin@arm.com> | 2014-01-24 07:53:04 +0000 |
commit | b1fadec968a2c9e323a9fff054299c4a6870eb83 (patch) | |
tree | 39d50806ab9c48f2edf86379f532d69c848df0ef /test/CodeGen/AArch64/neon-copy.ll | |
parent | dd38992ae8ac8761be18081f3618acc55288e42c (diff) | |
download | llvm-b1fadec968a2c9e323a9fff054299c4a6870eb83.tar.gz llvm-b1fadec968a2c9e323a9fff054299c4a6870eb83.tar.bz2 llvm-b1fadec968a2c9e323a9fff054299c4a6870eb83.tar.xz |
[AArch64 NEON] Fix a bug in implementing register copy bwtween FPR16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199978 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64/neon-copy.ll')
-rw-r--r-- | test/CodeGen/AArch64/neon-copy.ll | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/test/CodeGen/AArch64/neon-copy.ll b/test/CodeGen/AArch64/neon-copy.ll index 9960e15513..2a8d97414b 100644 --- a/test/CodeGen/AArch64/neon-copy.ll +++ b/test/CodeGen/AArch64/neon-copy.ll @@ -1262,4 +1262,15 @@ entry: %vecext1 = extractelement <1 x i64> %y, i32 0 %vecinit2 = insertelement <2 x i64> %vecinit, i64 %vecext1, i32 1 ret <2 x i64> %vecinit2 -}
\ No newline at end of file +} + +declare <1 x i16> @llvm.aarch64.neon.vsqadd.v1i16(<1 x i16>, <1 x i16>) + +define <1 x i16> @test_copy_FPR16_FPR16(<1 x i16> %a, <1 x i16> %b) { +; CHECK-LABEL: test_copy_FPR16_FPR16: +; CHECK: usqadd h1, h0 +; CHECK-NEXT: fmov s0, s1 +entry: + %vsqadd2.i = call <1 x i16> @llvm.aarch64.neon.vsqadd.v1i16(<1 x i16> %b, <1 x i16> %a) + ret <1 x i16> %vsqadd2.i +} |