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author | Tim Northover <tnorthover@apple.com> | 2014-05-24 12:42:26 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2014-05-24 12:42:26 +0000 |
commit | 9105f66d6f3cb6330ce77a88a0ef1ec0744aba85 (patch) | |
tree | d3360e2214cbc002d9587dba967b7ec514aeb997 /test/CodeGen/AArch64/neon-load-store-v1i32.ll | |
parent | 4ca8b0b66defbeff6693ce1fc68436a836939a53 (diff) | |
download | llvm-9105f66d6f3cb6330ce77a88a0ef1ec0744aba85.tar.gz llvm-9105f66d6f3cb6330ce77a88a0ef1ec0744aba85.tar.bz2 llvm-9105f66d6f3cb6330ce77a88a0ef1ec0744aba85.tar.xz |
AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
I'm doing this in two phases for a better "git blame" record. This
commit removes the previous AArch64 backend and redirects all
functionality to ARM64. It also deduplicates test-lines and removes
orphaned AArch64 tests.
The next step will be "git mv ARM64 AArch64" and rewire most of the
tests.
Hopefully LLVM is still functional, though it would be even better if
no-one ever had to care because the rename happens straight
afterwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209576 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64/neon-load-store-v1i32.ll')
-rw-r--r-- | test/CodeGen/AArch64/neon-load-store-v1i32.ll | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/test/CodeGen/AArch64/neon-load-store-v1i32.ll b/test/CodeGen/AArch64/neon-load-store-v1i32.ll deleted file mode 100644 index 12361ba008..0000000000 --- a/test/CodeGen/AArch64/neon-load-store-v1i32.ll +++ /dev/null @@ -1,30 +0,0 @@ -; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s -; arm64 does not use these pseudo-vectors, and they're not blessed by the PCS. Skipping. - -; Test load/store of v1i8, v1i16, v1i32 types can be selected correctly -define void @load.store.v1i8(<1 x i8>* %ptr, <1 x i8>* %ptr2) { -; CHECK-LABEL: load.store.v1i8: -; CHECK: ldr b{{[0-9]+}}, [x{{[0-9]+|sp}}] -; CHECK: str b{{[0-9]+}}, [x{{[0-9]+|sp}}] - %a = load <1 x i8>* %ptr - store <1 x i8> %a, <1 x i8>* %ptr2 - ret void -} - -define void @load.store.v1i16(<1 x i16>* %ptr, <1 x i16>* %ptr2) { -; CHECK-LABEL: load.store.v1i16: -; CHECK: ldr h{{[0-9]+}}, [x{{[0-9]+|sp}}] -; CHECK: str h{{[0-9]+}}, [x{{[0-9]+|sp}}] - %a = load <1 x i16>* %ptr - store <1 x i16> %a, <1 x i16>* %ptr2 - ret void -} - -define void @load.store.v1i32(<1 x i32>* %ptr, <1 x i32>* %ptr2) { -; CHECK-LABEL: load.store.v1i32: -; CHECK: ldr s{{[0-9]+}}, [x{{[0-9]+|sp}}] -; CHECK: str s{{[0-9]+}}, [x{{[0-9]+|sp}}] - %a = load <1 x i32>* %ptr - store <1 x i32> %a, <1 x i32>* %ptr2 - ret void -} |