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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-11-11 17:23:41 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-11-11 17:23:41 +0000 |
| commit | 028e4d27b1afc62be0687e9c3b57992c36852938 (patch) | |
| tree | 3622a9691dfecf043d2aa73aecad098ebc7c0275 /test/CodeGen/AArch64 | |
| parent | 12f06e1e0936b01bf329615ec4f0f5488c98c0dd (diff) | |
| download | llvm-028e4d27b1afc62be0687e9c3b57992c36852938.tar.gz llvm-028e4d27b1afc62be0687e9c3b57992c36852938.tar.bz2 llvm-028e4d27b1afc62be0687e9c3b57992c36852938.tar.xz | |
Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too
Reviewers: dsanders
Reviewed By: dsanders
CC: llvm-commits, nadav
Differential Revision: http://llvm-reviews.chandlerc.com/D1958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194393 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64')
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