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| author | Hao Liu <Hao.Liu@arm.com> | 2014-05-29 09:19:07 +0000 |
|---|---|---|
| committer | Hao Liu <Hao.Liu@arm.com> | 2014-05-29 09:19:07 +0000 |
| commit | bb7f18abf8b3c526a8f82fcc1d8caed419f907fc (patch) | |
| tree | f36c9089d3087914e9403d5780c5af4be0065f31 /test/CodeGen/AArch64 | |
| parent | 2a747bf1c566cbe9739f2a687bc093fdd5cfeda0 (diff) | |
| download | llvm-bb7f18abf8b3c526a8f82fcc1d8caed419f907fc.tar.gz llvm-bb7f18abf8b3c526a8f82fcc1d8caed419f907fc.tar.bz2 llvm-bb7f18abf8b3c526a8f82fcc1d8caed419f907fc.tar.xz | |
Fix an assertion failure caused by v1i64 in DAGCombiner Shrink.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209798 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64')
| -rw-r--r-- | test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll b/test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll new file mode 100644 index 0000000000..f31a570276 --- /dev/null +++ b/test/CodeGen/AArch64/2014-05-16-shrink-v1i64.ll @@ -0,0 +1,14 @@ +; RUN: llc -march=arm64 < %s + +; The DAGCombiner tries to do following shrink: +; Convert x+y to (VT)((SmallVT)x+(SmallVT)y) +; But currently it can't handle vector type and will trigger an assertion failure +; when it tries to generate an add mixed using vector type and scaler type. +; This test checks that such assertion failur should not happen. +define <1 x i64> @dotest(<1 x i64> %in0) { +entry: + %0 = add <1 x i64> %in0, %in0 + %vshl_n = shl <1 x i64> %0, <i64 32> + %vsra_n = ashr <1 x i64> %vshl_n, <i64 32> + ret <1 x i64> %vsra_n +} |