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authorEric Christopher <echristo@apple.com>2011-04-18 19:26:25 +0000
committerEric Christopher <echristo@apple.com>2011-04-18 19:26:25 +0000
commitd574bb5a6ee6cbe4d2387e4fa7f7f5ab099ea05f (patch)
treeed12398b9e95fd41961d5bb689e409b398ff7603 /test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll
parent3b55a372d4c457d65dadd9a04c2b2d310f1bab83 (diff)
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Fix a bug where we were counting the alias sets as completely used
registers for fast allocation a different way. This has us updating used registers only when we're using that exact register. Fixes rdar://9207598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129711 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll')
-rw-r--r--test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll15
1 files changed, 15 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll b/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll
new file mode 100644
index 0000000000..eb23de0b97
--- /dev/null
+++ b/test/CodeGen/ARM/2011-04-12-FastRegAlloc.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=fast
+; Previously we'd crash as out of registers on this input by clobbering all of
+; the aliases.
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
+target triple = "thumbv7-apple-darwin10.0.0"
+
+define void @_Z8TestCasev() nounwind ssp {
+entry:
+ %a = alloca float, align 4
+ %tmp = load float* %a, align 4
+ call void asm sideeffect "", "w,~{s0},~{s16}"(float %tmp) nounwind, !srcloc !0
+ ret void
+}
+
+!0 = metadata !{i32 109}