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author | Lang Hames <lhames@gmail.com> | 2012-03-06 00:19:55 +0000 |
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committer | Lang Hames <lhames@gmail.com> | 2012-03-06 00:19:55 +0000 |
commit | 4f92b5e6163b16d63eb63269c2aec670b55ea19a (patch) | |
tree | 964b85f11ba8de9367f99501d06a22d7f7166755 /test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll | |
parent | 923bb4117a13eac03a6ff630a108829ab767d519 (diff) | |
download | llvm-4f92b5e6163b16d63eb63269c2aec670b55ea19a.tar.gz llvm-4f92b5e6163b16d63eb63269c2aec670b55ea19a.tar.bz2 llvm-4f92b5e6163b16d63eb63269c2aec670b55ea19a.tar.xz |
Split fpscr into two registers: FPSCR and FPSCR_NZCV.
The fpscr register contains both flags (set by FP operations/comparisons) and
control bits. The control bits (FPSCR) should be reserved, since they're always
available and needn't be defined before use. The flag bits (FPSCR_NZCV) should
like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152076 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll')
-rw-r--r-- | test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll b/test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll new file mode 100644 index 0000000000..c9ea691249 --- /dev/null +++ b/test/CodeGen/ARM/2012-03-05-FPSCR-bug.ll @@ -0,0 +1,36 @@ +; RUN: llc -march=arm -mcpu=cortex-a8 -verify-machineinstrs < %s +; PR12165 +target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-p:32:32:32-v128:32:32" +target triple = "arm-none-linux" + +define hidden void @_strtod_r() nounwind { + br i1 undef, label %1, label %2 + +; <label>:1 ; preds = %0 + br label %2 + +; <label>:2 ; preds = %1, %0 + br i1 undef, label %3, label %8 + +; <label>:3 ; preds = %2 + br i1 undef, label %4, label %7 + +; <label>:4 ; preds = %3 + %5 = call i32 @llvm.flt.rounds() + %6 = icmp eq i32 %5, 1 + br i1 %6, label %8, label %7 + +; <label>:7 ; preds = %4, %3 + unreachable + +; <label>:8 ; preds = %4, %2 + br i1 undef, label %9, label %10 + +; <label>:9 ; preds = %8 + br label %10 + +; <label>:10 ; preds = %9, %8 + ret void +} + +declare i32 @llvm.flt.rounds() nounwind |