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| author | Tim Northover <tnorthover@apple.com> | 2014-06-13 16:45:52 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-06-13 16:45:52 +0000 |
| commit | 33fe993f2ec3a146e5954db14aa9a751141677f0 (patch) | |
| tree | de28a35ca3db99ec629451e0fa50509093d765e3 /test/CodeGen/ARM/atomic-64bit.ll | |
| parent | 6b3ed2b8214778b8eedae81be5193d1b89c49a66 (diff) | |
| download | llvm-33fe993f2ec3a146e5954db14aa9a751141677f0.tar.gz llvm-33fe993f2ec3a146e5954db14aa9a751141677f0.tar.bz2 llvm-33fe993f2ec3a146e5954db14aa9a751141677f0.tar.xz | |
Atomics: make use of the "cmpxchg weak" instruction.
This also simplifies the IR we create slightly: instead of working out
where success & failure should go manually, it turns out we can just
always jump to a success/failure block created for the purpose. Later
phases will sort out the mess without much difficulty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210917 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/atomic-64bit.ll')
| -rw-r--r-- | test/CodeGen/ARM/atomic-64bit.ll | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/test/CodeGen/ARM/atomic-64bit.ll b/test/CodeGen/ARM/atomic-64bit.ll index f18cf22cd6..462c1859dc 100644 --- a/test/CodeGen/ARM/atomic-64bit.ll +++ b/test/CodeGen/ARM/atomic-64bit.ll @@ -171,9 +171,10 @@ define i64 @test6(i64* %ptr, i64 %val) { define i64 @test7(i64* %ptr, i64 %val1, i64 %val2) { ; CHECK-LABEL: test7: -; CHECK: dmb {{ish$}} +; CHECK-DAG: mov [[VAL1LO:r[0-9]+]], r1 +; CHECK-DAG: dmb {{ish$}} ; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]] -; CHECK-LE-DAG: eor [[MISMATCH_LO:r[0-9]+]], [[REG1]], r1 +; CHECK-LE-DAG: eor [[MISMATCH_LO:r[0-9]+]], [[REG1]], [[VAL1LO]] ; CHECK-LE-DAG: eor [[MISMATCH_HI:r[0-9]+]], [[REG2]], r2 ; CHECK-BE-DAG: eor [[MISMATCH_LO:r[0-9]+]], [[REG2]], r2 ; CHECK-BE-DAG: eor [[MISMATCH_HI:r[0-9]+]], [[REG1]], r1 |